丝印代码：CD4514BF；CMOS 4-Bit Latch/4-to-16 Line Decoders

Features: ® Strobed input latch ® Inhibit contral u 100% tested for quiescent current at 20 V ® Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C u Noise margin (over full package temper- ature range): 1VatVpp= 5V 2VatVpp=10V 25VatVpp

丝印代码：CD4514BF；CMOS 4-Bit Latch/4-to-16 Line Decoders

Features: ® Strobed input latch ® Inhibit contral u 100% tested for quiescent current at 20 V ® Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C u Noise margin (over full package temper- ature range): 1VatVpp= 5V 2VatVpp=10V 25VatVpp

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：222.79 Kbytes Page：12 Pages

Cmos 4-Bit Latch/4-to-16 Line Decoders

文件：1.026599 Mbytes Page：15 Pages

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：995.38 Kbytes Page：15 Pages

CMOS 4-Bit Latch 4-to-16 Line Decoders

文件：978.31 Kbytes Page：15 Pages

丝印代码：CD4514BF3A；CMOS 4-Bit Latch/4-to-16 Line Decoders

Features: ® Strobed input latch ® Inhibit contral u 100% tested for quiescent current at 20 V ® Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C u Noise margin (over full package temper- ature range): 1VatVpp= 5V 2VatVpp=10V 25VatVpp

丝印代码：CD4514BF3A；CMOS 4-Bit Latch/4-to-16 Line Decoders

Features: ® Strobed input latch ® Inhibit contral u 100% tested for quiescent current at 20 V ® Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C u Noise margin (over full package temper- ature range): 1VatVpp= 5V 2VatVpp=10V 25VatVpp

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：222.79 Kbytes Page：12 Pages

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：995.38 Kbytes Page：15 Pages

CMOS 4-Bit Latch 4-to-16 Line Decoders

文件：978.31 Kbytes Page：15 Pages

Cmos 4-Bit Latch/4-to-16 Line Decoders

文件：1.026599 Mbytes Page：15 Pages

4-BIT LATCH/4-TO-16 LINE DECODER

DESCRIPTION TheHCC4514B/HCC4515B (extended temperature range) and theHCF4514B/HCF4515B (intermediate temperature range) are monolithic integrated circuits available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4514B/4515B consisting of a 4-bit strobed l

4-BIT LATCH/4-TO-16 LINE DECODER

DESCRIPTION TheHCC4514B/HCC4515B (extended temperature range) and theHCF4514B/HCF4515B (intermediate temperature range) are monolithic integrated circuits available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4514B/4515B consisting of a 4-bit strobed l

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

4-Bit Latched/4-to-16 Line Decoders

4-Bit Latched/4-to-16 Line Decoders

4-Bit Latched/4-to-16 Line Decoders

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

4-Bit Latched/4-to-16 Line Decoders

Dual 4-bit static shift register

Dual 4-bit static shift register

1-of-16 decoder/demultiplexer with input latches

4-Bit Transparent Latch/4-to-16 Line Decoder

4-Bit Transparent Latch/4-to-16 Line Decoder

4−Bit Transparent Latch / 4−to−16 Line Decoder

4−Bit Transparent Latch / 4−to−16 Line Decoder

4-Bit Transparent Latch/4-to-16 Line Decoder

CMOS 4-TO-16 LINE DECODERS WITH LATCH

CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC