CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：222.79 Kbytes Page：12 Pages

CMOS 4-Bit Latch 4-to-16 Line Decoders

文件：978.31 Kbytes Page：15 Pages

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：995.38 Kbytes Page：15 Pages

封装/外壳：24-DIP（0.600"，15.24mm） 包装：管件 描述：IC DECODER/DEMUX 1X4:16 24DIP 集成电路（IC） 信号开关，多路复用器，解码器

CMOS 4-Bit Latch 4-to-16 Line Decoders

文件：978.31 Kbytes Page：15 Pages

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：995.38 Kbytes Page：15 Pages

封装/外壳：24-DIP（0.600"，15.24mm） 包装：卷带（TR） 描述：IC DECODER/DEMUX 1X4:16 24DIP 集成电路（IC） 信号开关，多路复用器，解码器

4-BIT LATCH/4-TO-16 LINE DECODER

DESCRIPTION TheHCC4514B/HCC4515B (extended temperature range) and theHCF4514B/HCF4515B (intermediate temperature range) are monolithic integrated circuits available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4514B/4515B consisting of a 4-bit strobed l

4-BIT LATCH/4-TO-16 LINE DECODER

DESCRIPTION TheHCC4514B/HCC4515B (extended temperature range) and theHCF4514B/HCF4515B (intermediate temperature range) are monolithic integrated circuits available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4514B/4515B consisting of a 4-bit strobed l

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

4-Bit Latched/4-to-16 Line Decoders

4-Bit Latched/4-to-16 Line Decoders

4-Bit Latched/4-to-16 Line Decoders

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

4-Bit Latched/4-to-16 Line Decoders

Dual 4-bit static shift register

Dual 4-bit static shift register

1-of-16 decoder/demultiplexer with input latches

4-Bit Transparent Latch/4-to-16 Line Decoder

4-Bit Transparent Latch/4-to-16 Line Decoder

4−Bit Transparent Latch / 4−to−16 Line Decoder

4−Bit Transparent Latch / 4−to−16 Line Decoder

4-Bit Transparent Latch/4-to-16 Line Decoder

CMOS 4-TO-16 LINE DECODERS WITH LATCH

CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC