丝印代码：CD4502B；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：CD4502B；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

6 通道、3V 至 18V 反相器

CD4502B consists of six inverter/buffers with 3-state outputs. A logic \"1\" on the OUTPUT DISABLE input produces a high-impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic \"1\" on the INHIBIT input switches all six outputs • 2 TTL-load output drive capability\n• Common output-disable control\n• 100% tested for quiescent current at 20 V\n• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n• Noise Margin (full package-temperature range) =    1 V at VDD = 5 V    2 V ;

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

丝印代码：CD4502BE；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：CD4502BE；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：CD4502BE；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：CD4502BM；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：CD4502BM；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：CD4502BM；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：7702002EA；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：7702002EA；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

军用 6 通道 3V 至 18V 反相器

CD4502B consists of six inverter/buffers with 3-state outputs. A logic \"1\" on the OUTPUT DISABLE input produces a high-impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic \"1\" on the INHIBIT input switches all six outputs • 2 TTL-load output drive capability\n• Common output-disable control\n• 100% tested for quiescent current at 20 V\n• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C\n• Noise Margin (full package-temperature range) =    1 V at VDD = 5 V    2 V ;

CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

CMOS Strobed Hex Inverter/Buffer

Description CD4502BMS consists of six inverter/buffers with 3 state outputs. A logic “1” on the OUTPUT DISABLE input produces a high impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic “1” on the INHIBIT input swit

CMOS Strobed Hex Inverter/Buffer

Description\nCD4502BMS consists of six inverter/buffers with 3 state outputs. A logic “1” on the OUTPUT DISABLE input\nproduces a high impedance state in all six outputs. This feature permits common busing of the outputs, thus\nsimplifying system design. A Logic “1” on the INHIBIT input switches all • High Voltage Type (20V Rating)\n• 2 TTL Load Output Drive Capability\n• 3 State Outputs\n• Common Output Disable Control\n• Inhibit Control\n• 100% Tested for Quiescent Current at 20V\n• 5V, 10V and 15V Parametric Ratings\n• Maximum Input Current of 1µA at 18V Over Full Package Temperature Ran;

丝印代码：CM502B；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

丝印代码：CM502B；CMOS Strobed Hex Inverter/Buffer

Features: 2 TTL-load output drive capability 3-state outputs Common output-disable control Inhibit control = 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 4A at 18 V over full package-temperature range; 100 nA at 18 V

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR） 描述：IC BUFFER INVERT 18V 16DIP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUFFER INVERT 18V 16SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

CMOS Strobed Hex Inverter/Buffer

文件：1.12343 Mbytes Page：15 Pages

CMOS Strobed Hex Inverter/Buffer

文件：506.97 Kbytes Page：10 Pages

Strobed hex inverter/buffer

The HEF4502B consists of six inverter/buffers with 3-state outputs. When the output enable input (EO) is HIGH all six outputs (O1to O6) are in the high impedance OFF-state. When the enable input (E) is HIGH all six outputs are switched to LOW. The outputs have a 2-TTL load drive capability.

Strobed hex inverter/buffer

The HEF4502B consists of six inverter/buffers with 3-state outputs. When the output enable input (EO) is HIGH all six outputs (O1to O6) are in the high impedance OFF-state. When the enable input (E) is HIGH all six outputs are switched to LOW. The outputs have a 2-TTL load drive capability.

Strobed hex inverter/buffer

The HEF4502B consists of six inverter/buffers with 3-state outputs. When the output enable input (EO) is HIGH all six outputs (O1to O6) are in the high impedance OFF-state. When the enable input (E) is HIGH all six outputs are switched to LOW. The outputs have a 2-TTL load drive capability.

POWER TRANSISTORS(30A,100V,200W)

30 AMPERE POWER TRANSISTOR PNP SILICON 100 VOLTS 200 WATTS

Silicon NPN epitaxial planer transistor

Silicon NPN epitaxial planar type For general amplification ■ Features • Two elements incorporated into one package • Reduction of the mounting area and assembly cost by one half

Strobed Hex Inverter/Buffer

Strobed hex inverter/buffer

Strobed hex inverter/buffer