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CD4025B价格

参考价格:¥0.9678

型号:CD4025BE 品牌:TI 备注:这里有CD4025B多少钱,2026年最近7天走势,今日出价,今日竞价,CD4025B批发/采购报价,CD4025B行情走势销售排行榜,CD4025B报价。
型号 功能描述 生产厂家 企业 LOGO 操作

丝印代码:CD4025B;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025B;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

CD4025B

CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

CD4025B

3 通道、3 输入、3V 至 18V 或非门

CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR functionand supplement the existing family of CMOS gates. All inputs and outputs are buffered.\n\n The CD4001B, CD4002B, and CD4025B types are supplied in 14-lead hermetic dual-in-line ceramic p • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• Standardized symmetrical output characteristics\n• 5-V, 10-V, and 15-V parametric ratings\n• Noise margin (over full package temperature range):      1 V at VDD = 5 V      2 V at VDD = 10 V   2.5 V at VDD = 15 V\n• Meets all requi;

TI

德州仪器

CD4025B

CD4000系列 逻辑芯片

HGSEMI

华冠

CD4025B

CMOS NOR Gates

文件:206.27 Kbytes Page:5 Pages

TI

德州仪器

CD4025B

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

丝印代码:CD4025BE;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BE;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BE;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BF;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BF;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BF3A;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BF3A;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BM;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BM;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BM;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CD4025BM;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

CMOS NOR Gate

CD4000BMS - Dual 3 Plus Inverter\nCD4001BMS - Quad 2 Input\nCD4002BMS - Dual 4 Input\nCD4025BMS - Triple 3 Input\nCD4000BMS, CD4001BMS, CD4002BMS, and CD4025BMS NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All • High-Voltage Types (20V Rating) \n• Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V \n• Buffered Inputs and Outputs \n• Standard Symmetrical Output Characteristics \n• 100% Tested for Maximum Quiescent Current at 20V \n• 5V, 10V and 15V Parametric Ratings \n• Maximum Input Current;

RENESAS

瑞萨

CMOS NOR Gate

Features • High-Voltage Types (20V Rating) • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standard Symmetrical Output Characteristics • 100 Tested for Maximum Quiescent Current at 20V • 5V, 10V and 15V Parametric Ratings • Maximum Input Curre

RENESAS

瑞萨

CMOS NOR Gate

Description CD4000BMS - Dual 3 Plus Inverter CD4001BMS - Quad 2 Input CD4002BMS - Dual 4 Input CD4025BMS - Triple 3 Input CD4000BMS, CD4001BMS, CD4002BMS, and CD4025BMS NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing f

INTERSIL

丝印代码:CM025B;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CM025B;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

丝印代码:CM025B;CMOS NOR Gates

Features: = Propagation delay tima = 60 ns (typ.) at CL =50pF, Vpp=10V = Buffered inputs and outputs = Standardized symmetrical output characteristics = 100% tested for maximum quiescent current at 20 V ® 5-V, 10.V, and 15-V parametric ratings = Maximum input current of 1 uA at 18 V ov

TI

德州仪器

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

CMOS NOR Gates

文件:523.679 Kbytes Page:12 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

封装/外壳:14-DIP(0.300",7.62mm) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC GATE NOR 3CH 3-INP 14DIP 集成电路(IC) 门和反相器

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

封装/外壳:14-DIP(0.300",7.62mm) 包装:卷带(TR) 描述:IC GATE NOR 3CH 3-INP 14DIP 集成电路(IC) 门和反相器

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

CMOS NOR Gates

文件:523.679 Kbytes Page:12 Pages

TI

德州仪器

CMOS NOR Gates

文件:523.679 Kbytes Page:12 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

CMOS NOR Gates

文件:523.679 Kbytes Page:12 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

CMOS NOR Gates

文件:523.679 Kbytes Page:12 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

Buffered Triple 3-Input NAND,NOR Gate

文件:127.67 Kbytes Page:6 Pages

NSC

国半

CMOS NOR Gates

文件:523.679 Kbytes Page:12 Pages

TI

德州仪器

CMOS NOR Gates

文件:1.18416 Mbytes Page:18 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

CMOS NOR Gates

文件:952.17 Kbytes Page:19 Pages

TI

德州仪器

替换型号 功能描述 生产厂家 企业 LOGO 操作

CMOS QUAD 2-LINE-TO-1-LINE DATA SELECTOR/MULTIPLEXER

TI

德州仪器

Buffered Triple 3-Input NAND,NOR Gate

NSC

国半

CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer

INTERSIL

NOR GATE

STMICROELECTRONICS

意法半导体

Triple 3-input NOR Gate

HITACHIHitachi Semiconductor

日立日立公司

Triple 3-input NOR gate

PHILIPS

飞利浦

Triple 3-input NOR gate

PHILIPS

飞利浦

B-Suffix Series CMOS Gates

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

MOTOROLA

摩托罗拉

B-SUFFIX SERIES CMOS GATES

ONSEMI

安森美半导体

B−Suffix Series CMOS Gates

ONSEMI

安森美半导体

B-Suffix Series CMOS Gates

MOTOROLA

摩托罗拉

B-Suffix Series CMOS Gates

MOTOROLA

摩托罗拉

B-SUFFIX SERIES CMOS GATES

ONSEMI

安森美半导体

COMPLEMENTARY METAL OXIDE SILICON

NTE

INPUT NOR GATE

RANDE

CD4025B产品属性

  • 类型

    描述

  • Number of channels (#):

    3

  • Supply voltage (Min) (V):

    3

  • Supply voltage (Max) (V):

    18

  • Inputs per channel:

    3

  • IOL (Max) (mA):

    6.8

  • IOH (Max) (mA):

    -6.8

  • Output type:

    Push-Pull

  • Input type:

    Standard CMOS

  • Features:

    Standard speed (tpd > 50ns)

  • Data rate (Max) (Mbps):

    8

  • Rating:

    Catalog

更新时间:2026-5-14 15:47:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
22+
5000
只做原装鄙视假货15118075546
TI
25+
SO (NS)
6000
原厂原装,价格优势
TI/德州仪器
25+
原厂封装
10280
原厂授权代理,专注军工、汽车、医疗、工业、新能源!
TI/德州仪器
24+
SOP-14
9600
原装现货,优势供应,支持实单!
TI(德州仪器)
25+
SOP14208mil
2886
原装现货,免费供样,技术支持,原厂对接
TI
23+
SOP-14P5.2MM
5000
全新原装,支持实单,非诚勿扰
TI
23+
14-SOIC
15000
TI现货商!原装正品!
TI
23+
SOP-14P5.2MM
3200
公司只做原装,可来电咨询
TI/德州仪器
24+
SOP-14P5.2MM
74
只供应原装正品 欢迎询价
Texas Instruments
23+
7300
专注配单,只做原装进口现货

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