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CD4019B价格

参考价格:¥1.0333

型号:CD4019BE 品牌:TI 备注:这里有CD4019B多少钱,2026年最近7天走势,今日出价,今日竞价,CD4019B批发/采购报价,CD4019B行情走势销售排行榜,CD4019B报价。
型号 功能描述 生产厂家 企业 LOGO 操作

丝印代码:CD4019B;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019B;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

CD4019B

CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

CD4019B

CMOS 四路与/或选择门

CD4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single-input OR gate. Selection is accomplished by control bits Ka and Kb. In addition to selection of either channel A or channel B information, the control bits can be applied simult • Medium speed operation……tPHL = tPLH = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• 100% tested for quiescent current at 20 V\n• Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS Devices\"\n• Noise margin (full package-temperat;

TI

德州仪器

CD4019B

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CD4019B

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

丝印代码:CD4019BE;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BE;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BE;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BF;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BF;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BF3A;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BF3A;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BM;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BM;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BM;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CD4019BM;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

FAIRCHILD

仙童半导体

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

FAIRCHILD

仙童半导体

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

FAIRCHILD

仙童半导体

Quad AND-OR Select Gate

General Description The CD4019BC is a complementary MOS quad AND-OR select gate. Low power and high noise margin over a wide voltage range is possible through implementation of N- and P-channel enhancement mode transistors. These comple mentary MOS (CMOS) transistors provide the building blocks

FAIRCHILD

仙童半导体

CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

CMOS 四路与/或选择门

CD4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single-input OR gate. Selection is accomplished by control bits Ka and Kb. In addition to selection of either channel A or channel B information, the control bits can be applied simult • Medium speed operation……tPHL = tPLH = 60 ns (typ.) at CL = 50 pF, VDD = 10 V\n• 100% tested for quiescent current at 20 V\n• Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of ’B’ Series CMOS Devices\"\n• Noise margin (full package-temperat;

TI

德州仪器

CMOS Quad AND/OR Select Gate

Description CD4019BMS types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input OR gate. Selection is accomplished by control bits Ka and Kb. In addition to selection of either channel A or channel B information, the control bits ca

INTERSIL

丝印代码:CM019B;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

丝印代码:CM019B;CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

Quad AND-OR Select Gate

文件:107.97 Kbytes Page:4 Pages

NSC

国半

封装/外壳:16-DIP(0.300",7.62mm) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC QUAD AND/OR SELECT GATE 16DIP 集成电路(IC) 门和反相器 - 多功能,可配置

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

封装/外壳:16-DIP(0.300",7.62mm) 包装:卷带(TR) 描述:IC QUAD AND/OR SELECT GATE 16DIP 集成电路(IC) 门和反相器 - 多功能,可配置

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

Quad AND-OR Select Gate

文件:107.97 Kbytes Page:4 Pages

NSC

国半

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

RENESAS

瑞萨

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Select Gate

文件:515.929 Kbytes Page:11 Pages

TI

德州仪器

CMOS Quad AND/OR Gate

文件:938.29 Kbytes Page:16 Pages

TI

德州仪器

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

PHILIPS

飞利浦

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

PHILIPS

飞利浦

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

PHILIPS

飞利浦

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

PHILIPS

飞利浦

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

PHILIPS

飞利浦

替换型号 功能描述 生产厂家 企业 LOGO 操作

QUAD AND/OR SELECT GATE

STMICROELECTRONICS

意法半导体

Quadruple 2-input multiplexer

PHILIPS

飞利浦

Quadruple 2-input multiplexer

PHILIPS

飞利浦

4-Bit AND/OR Selector or Quad 2-Channel Data Selector or Quad Exclusive nor gate

MOTOROLA

摩托罗拉

COMPLEMENTARY METAL OXIDE SILICON

NTE

C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

ETC1

CD4019B产品属性

  • 类型

    描述

  • VCC(Min)(V):

    3

  • VCC(Max)(V):

    18

  • Channels(#):

    4

  • Inputs per channel:

    4

  • IOL(Max)(mA):

    6.8

  • Input type:

    Standard CMOS

  • IOH(Max)(mA):

    -6.8

  • Output type:

    Push-Pull

  • Features:

    Standard Speed (tpd > 50ns)

  • Data rate(Max)(Mbps):

    8

  • Rating:

    Catalog

  • Operating temperature range(C):

    -55 to 125

  • Package size:

    mm2

  • 16)16SO:

    80 mm2

  • 16)16SOIC:

    59 mm2

  • 16)16TSSOP:

    22 mm2

  • Package Group:

    PDIP

更新时间:2026-7-22 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
25+
CDIP-14
7734
样件支持,可原厂排单订货!
TI
25+
CDIP-14
7786
正规渠道,免费送样。支持账期,BOM一站式配齐
Sancon
23+
DIP
20000
全新原装假一赔十
TI
26+
DIP/SMD
6980
原装现货,可开13%税票
TI
20+
N/A
3600
专业配单,原装正品假一罚十,代理渠道价格优
TI
23+
NA
20000
陶瓷
25+
CDIP-14
880000
明嘉莱只做原装正品现货
TI
22+
5000
只做原装鄙视假货15118075546
TI(德州仪器)
26+
CDIP-14
3600
十二年VIP会员,诚信经营,原装库存·可零售!
陶瓷
24+
CDIP-14
52446
只做原装进口现货

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