丝印代码：CD4019BF；CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation... .. + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

丝印代码：CD4019BF；CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation... .. + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

CMOS Quad AND/OR Gate

文件：938.29 Kbytes Page：16 Pages

CMOS Quad AND/OR Select Gate

文件：515.929 Kbytes Page：11 Pages

丝印代码：CD4019BF3A；CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation... .. + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

丝印代码：CD4019BF3A；CMOS Quaa AND/OR Select Gate High-Voltage Types (20-Volt Rating)

Features: 8 Medium-speed operation... .. + -tpHL = tp Ly = 60 ns (typ.) at C) =50pF,Vpp=10V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 138, “S

CMOS Quad AND/OR Gate

文件：938.29 Kbytes Page：16 Pages

CMOS Quad AND/OR Select Gate

文件：515.929 Kbytes Page：11 Pages

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

Quadruple 2-input multiplexer

DESCRIPTION The HEF4019B provides four multiplexing circuits with common select inputs (SA, SB); each circuit contains two inputs (An, Bn) and one output (On). It may be used to select four bits of information from one of two sources.

Quad AND-OR Select Gate

Quad AND-OR Select Gate

Quad AND-OR Select Gate

CMOS Quad AND/OR Select Gate

QUAD AND/OR SELECT GATE

Quadruple 2-input multiplexer

Quadruple 2-input multiplexer

4-Bit AND/OR Selector or Quad 2-Channel Data Selector or Quad Exclusive nor gate

COMPLEMENTARY METAL OXIDE SILICON

C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC