丝印代码：CBTLV3857；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

丝印代码：CBTLV3857；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

丝印代码：CBTLV3857；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

Audio sound controller

The BH3857AFV is a signal-processing IC for controlling audio quality in CD radio-cassette players and mini-component stereo systems. Three-line serial control is available making it easy to adjust tone and volume using a microprocessor. Features 1) Volume (main volume) and tone (bass and treble

10-bit bus switch with 10 kohm pull-down termination resistors

DESCRIPTION This 10-bit bus switch is designed for 3 V to 3.6 V VCC operation and SSTL_2 output enable (OE) input levels. FEATURES • Enable signal is SSTL_2 compatible • Optimized for use in Double Data Rate (DDR) SDRAM applications • Flow-through architecture optimizes PCB layout

10-bit bus switch with 10 kohm pull-down termination resistors

DESCRIPTION This 10-bit bus switch is designed for 3 V to 3.6 V VCC operation and SSTL_2 output enable (OE) input levels. FEATURES • Enable signal is SSTL_2 compatible • Optimized for use in Double Data Rate (DDR) SDRAM applications • Flow-through architecture optimizes PCB layout

Quasi-split sound processor with two FM demodulators

文件：110.9 Kbytes Page：14 Pages

Isolated Boost PFC Preregulator Controller

文件：127.63 Kbytes Page：10 Pages