DESCRIPTION

This 10-bit bus switch is designed for 3 V to 3.6 V VCC operation and SSTL_2 output enable (OE) input levels.

FEATURES

• Enable signal is SSTL_2 compatible

• Optimized for use in Double Data Rate (DDR) SDRAM

applications

• Flow-through architecture optimizes PCB layout

• Designed to be used with 200 Mbps

• Switch on resistance is designed to eliminate the need for series

resistor to DDR SDRAM

• Internal 10 kΩ pull-down resistors on B port

• Internal 50 kΩ pull-up resistor on output enable input

• Full DDR solution provided when used with SSTL16857 and

PCK857

• Latch-up protection exceeds 500 mA per JESD78

• ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101