Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

8K X 8 BIT LOW POWER CMOS SRAM

DESCRIPTION\nThe AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes:\n  - Read - Standby\n  - Write - Data Retention\nThe memory array is based on a 6-transistor cell.FEATURES\n 8192 x 8 bit static CMOS RAM\n 70 ns Access Times\n Common data  8192 x 8 bit static CMOS RAM\n 70 ns Access Times\n Common data inputs and outputs\nThree-state outputs\n Typ. operating supply current\n      o 70 ns: 10 mA\nStandby current:\n      o< 2 μA at Ta ≤ 70 °C\n Data retention current at 2 V:\n      o< 1 μA at Ta ≤ 70 °C\nTTL/CMOS-compatible\nA;

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

8K X 8 BIT LOW POWER CMOS SRAM

FEATURES Access time :55ns Low power consumption: Operation current : 15mA (TYP.), VCC = 3.0V Standby current : 1μ A (TYP.), VCC = 3.0V Wide range power supply : 2.7 ~ 5.5V Fully Compatible with all Competitors 5V product Fully Compatible with all Competitors 3.3V product All inp

封装/外壳：28-DIP（0.600"，15.24mm） 包装：卷带（TR） 描述：IC SRAM 64KBIT PARALLEL 28DIP 集成电路（IC） 存储器

8K x 8 Bit Low Power CMOS SRAM

8K x 8 Bit Low Power CMOS SRAM

封装/外壳：28-SOIC（0.330"，8.38mm 宽） 包装：卷带（TR） 描述：IC SRAM 64KBIT PARALLEL 28SOP 集成电路（IC） 存储器

8K X 8 BIT LOW POWER CMOS SRAM

GENERAL DESCRIPTION The AS6C6264 is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. FEATURES

8K X 8 BIT LOW POWER CMOS SRAM

FEATURES Access time :55ns Low power consumption: Operation current : 15mA (TYP.), VCC = 3.0V Standby current : 1μ A (TYP.), VCC = 3.0V Wide range power supply : 2.7 ~ 5.5V Fully Compatible with all Competitors 5V product Fully Compatible with all Competitors 3.3V product All inp