8K X 8 BIT LOW POWER CMOS SRAM

GENERAL DESCRIPTION The AS6C6264 is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. FEATURES

8K X 8 BIT LOW POWER CMOS SRAM

GENERAL DESCRIPTION The AS6C6264 is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. FEATURES

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

Common data inputs and outputs

DESCRIPTION The AS6C6264A is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a 6-transistor cell. FEATURES  8192 x 8 bit static CMOS RAM  70 ns Access T

封装/外壳：28-DIP（0.600"，15.24mm） 包装：托盘 描述：IC SRAM 64KBIT PARALLEL 28DIP 集成电路（IC） 存储器

封装/外壳：28-SOIC（0.330"，8.38mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SRAM 64KBIT PARALLEL 28SOP 集成电路（IC） 存储器