Power MOS V is a new generation of high voltage N-Channel enhancement mode power MOSFETs.

POWER MOS V® Power MOS V® is a new generation of high voltage N-Channel enhancement mode power MOSFETs. This new technology minimizes the JFET effect, increases packing density and reduces the on-resistance. Power MOS V® also achieves faster switching speeds through optimized gate layout. • Iden

isc N-Channel MOSFET Transistor

DESCRIPTION ·Drain Current :ID= 58A@ TC=25℃ ·Drain Source Voltage : VDSS= 500V(Min) ·100 avalanche tested ·Minimum Lot-to-Lot variations for robust device performance and reliable operation APPLICATIONS ·high voltage, high speed power switching

POWER MOS V

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Power MOS V is a new generation of high voltage N-Channel enhancement mode power MOSFETs.

Power MOS V® is a new generation of high voltage N-Channel enhancement mode power MOSFETs. This new technology minimizes the JFET effect, increases packing density and reduces the on-resistance. Power MOS V® also achieves faster switching speeds through optimized gate layout. • Identical Specific

Power MOS V is a new generation of high voltage N-Channel enhancement mode power MOSFETs.

POWER MOS V® Power MOS V® is a new generation of high voltage N-Channel enhancement mode power MOSFETs. This new technology minimizes the JFET effect, increases packing density and reduces the on-resistance. Power MOS V® also achieves faster switching speeds through optimized gate layout. • Iden

Power MOS VITM is a new generation of low gate charge, high voltage N-Channel enhancement mode power MOSFETs.

POWER MOS VI™ Power MOS VITM is a new generation of low gate charge, high voltage N-Channel enhancement mode power MOSFETs. Lower gate charge is achieved by optimizing the manufacturing process to minimize Cissand Crss. Lower gate charge coupled with Power MOS VITM optimized gate layout, delivers

Power MOS VITM is a new generation of low gate charge, high voltage N-Channel enhancement mode power MOSFETs.

POWER MOS VI™ Power MOS VITM is a new generation of low gate charge, high voltage N-Channel enhancement mode power MOSFETs. Lower gate charge is achieved by optimizing the manufacturing process to minimize Ciss and Crss. Lower gate charge coupled with Power MOS VITM optimized gate layout, deliver

POWER MOS V

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