位置：首页 > IC中文资料 > ADSP-21593
| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
ADSP-21593 | SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 |   | |
ADSP-21593 | SHARC Dual-Core DSP with Arm Cortex-A5 文件：3.26181 Mbytes Page：143 Pages | AD 亚德诺 | | |
SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 文件：3.26181 Mbytes Page：143 Pages | AD 亚德诺 | | ||
封装/外壳：400-LBGA，CSPBGA 包装：托盘 描述：PROCESSOR 集成电路（IC） DSP（数字信号处理器） | AD 亚德诺 | | ||
封装/外壳：400-LBGA，CSPBGA 包装：托盘 描述：2 X 800MHZ SHARC+ 集成电路（IC） DSP（数字信号处理器） | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 文件：3.26181 Mbytes Page：143 Pages | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 文件：3.26181 Mbytes Page：143 Pages | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 文件：3.26181 Mbytes Page：143 Pages | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 文件：3.26181 Mbytes Page：143 Pages | AD 亚德诺 | | ||
SHARC Dual-Core DSP with Arm Cortex-A5 文件：3.26181 Mbytes Page：143 Pages | AD 亚德诺 | | ||
DIMMING BALLAST CONTROL IC Description The IR21592/IR21593 are complete dimming ballast controllers and 600V half-bridge drivers all in one IC. The architecture includes phase control for transformer-less lamp power sensing and regulation which minimizes changes needed to adapt non-dimming ballasts for dimming. Feat | IRF | | ||
DIMMING BALLAST CONTROL IC Description The IR2159/IR21591 are complete dimming ballast controllers and 600V half-bridge drivers all in one IC. The architecture includes phase control for transformer-less lamp power sensing and regulation which minimizes changes needed to adapt non-dimming ballasts for dimming. Featu | IRF | |
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ADI(亚德诺) |
24+ |
BGA-400 |
919 |
深耕行业12年,可提供技术支持。 |
|||
ADI(亚德诺)/LINEAR(凌特) |
2024+ |
BGA-400 |
500000 |
诚信服务,绝对原装原盘 |
|||
ADI(亚德诺)/LINEAR(凌特) |
20+ |
BGA-400 |
8490 |
||||
N/A |
24+ |
N/A |
9548 |
原厂可订货,技术支持,直接渠道。可签保供合同 |
|||
ADI/亚德诺 |
22+ |
66900 |
原封装 |
||||
ADI/亚德诺 |
25+ |
原厂封装 |
10280 |
原厂授权一级代理,专注军工、汽车、医疗、工业、新能源、电力! |
|||
ADI |
24+ |
BGA |
6980 |
原装现货,可开13%税票 |
|||
ADI/亚德诺 |
2511 |
原封装 |
66900 |
电子元器件采购降本 30%!盈慧通原厂直采,砍掉中间差价 |
|||
24+ |
N/A |
64000 |
一级代理-主营优势-实惠价格-不悔选择 |
||||
ADI |
23+ |
BGA |
3600 |
绝对全新原装!现货!特价!请放心订购! |
ADSP-21593芯片相关品牌
ADSP-21593规格书下载地址
ADSP-21593参数引脚图相关
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ADSP-21593数据表相关新闻
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DdatasheetPDF页码索引
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