SHARC Dual-Core DSP with Arm Cortex-A5

文件：3.26181 Mbytes Page：143 Pages

SHARC Dual-Core DSP with Arm Cortex-A5

SYSTEM FEATURES Dual-enhanced SHARC+ floating-point cores High performance SHARC+ cores (up to 1 GHz each) Up to 5 Mb (640 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed-point support Byte, shor

SHARC Dual-Core DSP with Arm Cortex-A5

文件：3.26181 Mbytes Page：143 Pages

DIMMING BALLAST CONTROL IC

Description The IR21592/IR21593 are complete dimming ballast controllers and 600V half-bridge drivers all in one IC. The architecture includes phase control for transformer-less lamp power sensing and regulation which minimizes changes needed to adapt non-dimming ballasts for dimming. Feat

DIMMING BALLAST CONTROL IC

Description The IR2159/IR21591 are complete dimming ballast controllers and 600V half-bridge drivers all in one IC. The architecture includes phase control for transformer-less lamp power sensing and regulation which minimizes changes needed to adapt non-dimming ballasts for dimming. Featu