700 MHz 到 4200 MHz Tx DGA

ADL5335 是一款数字增益放大器 (DGA)，专门针对无线变送器应用而进行优化。差分输入和单端输出有助于在具有差分输出的宽带集成收发器和具有单端输入的 RF 增益模块及驱动放大器之间实现无平衡-不平衡转换器的连接。\n\n 可通过 Analog Devices, Inc. 的标准串行外设接口 (SPI) 端口在最高 12.0 dB 的增益到最低 −8.0 dB 的增益范围内对增益进行编程，增益步长为 0.5 dB。ADL5335 还具备快攻功能，可通过应用单脉冲快速提高或降低增益。\n\n 使用基于温度计的数字步进衰减器 (DSA) 可确保增益变化基本无干扰。ADL53 • 差分输入到单端输出转换\n\n• 宽的输入频率范围：700 MHz 到 4200 MHz\n\n• 最大增益：12.0 dB（典型值）\n\n• 增益范围 20 dB（典型值）\n\n• 增益步长：0.5 dB（典型值）\n\n• 基于温度计的无干扰数字分级衰减器\n\n• 具有可编程增益步长的快攻增益开关\n\n• 匹配的 50 Ω 输入和输出;

DGA

文件：512.809 Kbytes Page：16 Pages

DGA

文件：512.809 Kbytes Page：16 Pages

封装/外壳：16-WQFN 裸露焊盘，CSP 包装：托盘 描述：IC AMP GP 700MHZ-4.2GHZ 16LFCSP RF/IF，射频/中频和 RFID 射频放大器

封装/外壳：16-WQFN 裸露焊盘，CSP 包装：卷带（TR） 描述：IC AMP GP 700MHZ-4.2GHZ 16LFCSP RF/IF，射频/中频和 RFID 射频放大器

DGA

文件：512.809 Kbytes Page：16 Pages

2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5334/AD5335/AD5336/AD5344 are quad 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 µA at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive

3-Phase Bridge Rectifier

Description: The NTE5335 and NTE5338 3–Phase bridge rectifiers incorporate highly efficient thermal management to provide high surge capability, extended life, and reliable performance. Available in an industry standard screw–mount package, these devices provide 2500Vrms from all terminals to the

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

P-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan

P-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan