N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input i

MOSFET, N-Channel Enhancement-Mode, 350V, 15 Ohm

N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input i

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input i

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

N-Channel Enhancement-Mode Vertical DMOS FET

General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input i

N-Channel Enhancement-Mode Vertical DMOS FETs

Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the

N-Channel Enhancement-Mode Vertical DMOS FETs

2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs

GENERAL DESCRIPTION The AD5334/AD5335/AD5336/AD5344 are quad 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 µA at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive

3-Phase Bridge Rectifier

Description: The NTE5335 and NTE5338 3–Phase bridge rectifiers incorporate highly efficient thermal management to provide high surge capability, extended life, and reliable performance. Available in an industry standard screw–mount package, these devices provide 2500Vrms from all terminals to the

P-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan

P-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan