ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

文件：499.11 Kbytes Page：26 Pages

105 MSPS A/D Converter

文件：1.11201 Mbytes Page：35 Pages

ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

文件：499.11 Kbytes Page：26 Pages