ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

双通道、12 位、105MSPS 模数转换器 (ADC)

The ADC12DS105 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. This converter uses a d • Clock Duty Cycle Stabilizer\n• Serial LVDS Outputs\n• Overrange Outputs\n• Resolution: 12 Bits\n• SNR (fIN = 240 MHz): 68.5 dBFS (typ)\n• Full Power Bandwidth: 1 GHz (typ)\n• Power Consumption: 1 W (typ);

105 MSPS A/D Converter

文件：1.11201 Mbytes Page：35 Pages

Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

文件：499.11 Kbytes Page：26 Pages

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

丝印代码：12DS105；ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

1FEATURES 2• Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm pin-pitch) APPLICATIONS • High IF Sampling Receivers • Wireless Base Station Receivers • Test a

Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

文件：499.11 Kbytes Page：26 Pages

Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

文件：499.11 Kbytes Page：26 Pages

105 MSPS A/D Converter

文件：1.11201 Mbytes Page：35 Pages

105 MSPS A/D Converter

文件：1.11201 Mbytes Page：35 Pages

封装/外壳：60-WFQFN 裸露焊盘 包装：管件 描述：IC ADC 12BIT PIPELINED 60WQFN 集成电路（IC） 模数转换器（ADC）

105 MSPS A/D Converter

文件：1.11201 Mbytes Page：35 Pages

105 MSPS A/D Converter

文件：1.11201 Mbytes Page：35 Pages

Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs

文件：499.11 Kbytes Page：26 Pages

包装：散装 描述：BOARD EVAL FOR ADC12DS105 开发板，套件，编程器 评估板 - 模数转换器（ADC）