20-bit bus interface D-type latch 3-State

DESCRIPTION The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. FEATUR

2.5V/3.3V ALVT 20-bit bus interface latch 3-State

DESCRIPTION The 74ALVT16841 Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V. FEATURES • High speed parallel latches • 5V I/O Compatible • Live inser

2.5V/3.3V ALVT 20-bit bus interface latch 3-State

DESCRIPTION The 74ALVT16841 Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V. FEATURES • High speed parallel latches • 5V I/O Compatible • Live inser

20-bit bus interface latch 3-State

DESCRIPTION The 74ABT16841A Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Live insertion/extraction permitted • Extra data width for wide address/data paths or buses carrying parity

20-bit bus interface latch 3-State

DESCRIPTION The 74ABT16841A Bus interface latch is designed to provide extra data width for wider data/address paths of buses carrying parity. FEATURES • High speed parallel latches • Live insertion/extraction permitted • Extra data width for wide address/data paths or buses carrying parity