丝印代码：ABT18652；SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER

Member of the Texas Instruments Widebus Family Compatible With IEEE Std 1149.1-1990 JTAG) Test Access Port and Boundary-Scan Architecture Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data Two Boundary-Scan Cells Per I/O for

丝印代码：ABT18652；SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER

Member of the Texas Instruments Widebus Family Compatible With IEEE Std 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data Two Boundary-Scan Cells Per I/O for

丝印代码：ABT18652；SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER

Member of the Texas Instruments Widebus Family Compatible With IEEE Std 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data Two Boundary-Scan Cells Per I/O for

丝印代码：ABT18652；SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER

Member of the Texas Instruments Widebus Family Compatible With IEEE Std 1149.1-1990 JTAG) Test Access Port and Boundary-Scan Architecture Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data Two Boundary-Scan Cells Per I/O for

丝印代码：ABT18652；SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER

Member of the Texas Instruments Widebus Family Compatible With IEEE Std 1149.1-1990 JTAG) Test Access Port and Boundary-Scan Architecture Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data Two Boundary-Scan Cells Per I/O for

丝印代码：ABT18652；SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER

Member of the Texas Instruments Widebus Family Compatible With IEEE Std 1149.1-1990 JTAG) Test Access Port and Boundary-Scan Architecture Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data Two Boundary-Scan Cells Per I/O for

丝印代码：ABT18652；SCAN TEST DEVICE WITH 18-BIT TRANSCEIVER AND REGISTER

Member of the Texas Instruments Widebus Family Compatible With IEEE Std 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture Includes D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data Two Boundary-Scan Cells Per I/O for