19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI

Features • Fixed feedback path; 0ps input-to-output delay • 9 Selectable SMBus addresses; multiple devices can share same SMBus segment • 8 dedicated OE# pins; hardware control of outputs • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL BW; minimizes jitter peaking in d

Enhanced DB1900Z Compliant 19-Output Buffer

19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI

文件：341.77 Kbytes Page：20 Pages

19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI

Features • Fixed feedback path; 0ps input-to-output delay • 9 Selectable SMBus addresses; multiple devices can share same SMBus segment • 8 dedicated OE# pins; hardware control of outputs • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL BW; minimizes jitter peaking in d

19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI

Features • Fixed feedback path; 0ps input-to-output delay • 9 Selectable SMBus addresses; multiple devices can share same SMBus segment • 8 dedicated OE# pins; hardware control of outputs • PLL or bypass mode; PLL can dejitter incoming clock • Selectable PLL BW; minimizes jitter peaking in d

封装/外壳：72-VFQFN 裸露焊盘 包装：管件 描述：IC BUFFER DIFF PCIE 72VFQFPN 集成电路（IC） 应用特定时钟/定时

19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI

文件：341.77 Kbytes Page：20 Pages

19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI

文件：341.77 Kbytes Page：20 Pages

封装/外壳：72-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC BUFFER DIFF PCIE 72VFQFPN 集成电路（IC） 应用特定时钟/定时

19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

文件：258.42 Kbytes Page：18 Pages

19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

文件：192.46 Kbytes Page：16 Pages

19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

文件：192.46 Kbytes Page：16 Pages

19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

文件：258.42 Kbytes Page：18 Pages

19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

文件：192.46 Kbytes Page：16 Pages