封装/外壳：20-VFQFN 裸露焊盘 包装：托盘 描述：CLOCK SYNTHESIZE/GENERATOR/PLL 集成电路（IC） 时钟缓冲器，驱动器

Differential-to-3.3V, 2.5V LVPECL Clock Divider and Fanout Buffer

General Description The 8V79S674 is a clock divider and fanout buffer. The device has been designed for clock signal division in wireless base station radio equipment boards. The device is optimized to deliver excellent additive phase jitter performance. The 8V79S674 uses SiGe technology for

Clock signal division and distribution

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封装/外壳：20-VFQFN 裸露焊盘 包装：托盘 描述：CLOCK SYNTHESIZE/GENERATOR/PLL 集成电路（IC） 时钟缓冲器，驱动器