丝印代码：ICS87993AILF；1-to-5 Differential-to-3.3V LVPECL PLL Clock Driver W/Dynamic Clock Switch

FEATURES • Five differential 3.3V LVPECL outputs • Selectable differential clock inputs • CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output frequency range: 50MHz to 250MHz • VCO range: 200MHz to 500MHz • External feedback for “ze

丝印代码：ICS87993AILF；1-to-5 Differential-to-3.3V LVPECL PLL Clock Driver W/Dynamic Clock Switch

FEATURES • Five differential 3.3V LVPECL outputs • Selectable differential clock inputs • CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output frequency range: 50MHz to 250MHz • VCO range: 200MHz to 500MHz • External feedback for “ze

封装/外壳：32-LQFP 包装：卷带（TR） 描述：IC PLL CLK DRIVER 1-5 32-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：32-LQFP 包装：卷带（TR） 描述：IC PLL CLK DRIVER 1-5 32-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

1-to-5 Differential-to-3.3V LVPECL PLL Clock Driver W/Dynamic Clock Switch

FEATURES • Five differential 3.3V LVPECL outputs • Selectable differential clock inputs • CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output frequency range: 50MHz to 250MHz • VCO range: 200MHz to 500MHz • External feedback for “ze

1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL PLL CLOCK DRIVER W/DYNAMIC CLOCK SWITCH

文件：186.48 Kbytes Page：16 Pages

1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL PLL CLOCK DRIVER W/DYNAMIC CLOCK SWITCH

文件：186.48 Kbytes Page：16 Pages