FEATURES

• Five differential 3.3V LVPECL outputs

• Selectable differential clock inputs

• CLKx, nCLKx pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Output frequency range: 50MHz to 250MHz

• VCO range: 200MHz to 500MHz

• External feedback for “zero delay” clock regeneration

with confi gurable frequencies

• Cycle-to-cycle jitter (RMS): 20ps (maximum)

• Output skew: 70ps (maximum), within one bank

• 3.3V supply voltage

• -40°C to 85°C ambient operating temperature

• Lead-Free package available

• Pin compatible with MPC993