Differential-to-3.3V LVPECL Zero Delay/Multiplier/Divider

GENERAL DESCRIPTION The 873995 is a Zero Delay/Multiplier/Divider with hitless input clock switching capability and a member of the family of low jitter/phase noise devices from IDT. The 873995 is ideal for use in redundant, fault tolerant clock trees where low phase noise and low jitter are

Differential-to-3.3V LVPECL Zero Delay/Multiplier/Divider

文件：313.67 Kbytes Page：20 Pages

LVPECL FemtoClock Dynamic Clock Switch/Generator

Differential-to-3.3V LVPECL Zero Delay/Multiplier/Divider

文件：313.67 Kbytes Page：20 Pages

封装/外壳：48-TQFP 裸露焊盘 包装：卷带（TR） 描述：IC ZD/MULT/DIVIDER 48-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

Differential-to-3.3V LVPECL Zero Delay/Multiplier/Divider

文件：313.67 Kbytes Page：20 Pages

封装/外壳：48-TQFP 裸露焊盘 包装：卷带（TR） 描述：IC ZD/MULT/DIVIDER 48-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器