700MHz, Differential-to-3.3V LVPECL Zero Delay Clock Generator

Features •One differential 3.3V LVPECL output pair, one differential feedback output pair •Differential CLK, nCLK input pair •CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, HCSL •Output frequency range: 31.25MHz to 700MHz •Input frequency range: 31.25

封装/外壳：32-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC PLL CLK GEN LVPECL 32VFQFPN 集成电路（IC） 时钟发生器，PLL，频率合成器

700MHz, Differential-to-3.3V LVPECL Zero Delay Clock Generator

Features •One differential 3.3V LVPECL output pair, one differential feedback output pair •Differential CLK, nCLK input pair •CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, HCSL •Output frequency range: 31.25MHz to 700MHz •Input frequency range: 31.25

封装/外壳：32-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC PLL CLK GEN LVPECL 32VFQFPN 集成电路（IC） 时钟发生器，PLL，频率合成器