Differential-To-HSTL Zero Delay Clock Generator

Features • One differential HSTL output pair One differential feedback output pair • Differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential  input levels: LVPECL, LVDS, HSTL, HCSL, SSTL • Output frequency range: 31.25MHz to 630MHz • Input frequency range:

Differential to HSTL Zero Delay Buffer Clock Generator