28 (7/36) AWG Tinned Copper

文件：411.69 Kbytes Page：4 Pages

15.625MHZ TO 62.5MHZ, 1:4 LVCMOS/ LVTTL Zero Delay Clock Buffer

FEATURES • Four LVCMOS/LVTTL outputs, 7Ω typical output impedance • Single LVCMOS/LVTTL clock input • CLK accepts the following input levels: LVCMOS or LVTTL • Output frequency range: 15.625MHz to 62.5MHz • Input frequency range: 15.625MHz to 62.5MHz • VCO range: 250MHz to 500MHz • External

Output frequency range

文件：219.51 Kbytes Page：13 Pages

28 (7/36) AWG Tinned Copper

文件：410.39 Kbytes Page：4 Pages

包装：线轴 描述：CABLE 4COND 28AWG SHLD 500' 电缆，电线 多芯导线

包装：线轴 描述：CABLE 4COND 28AWG SHLD 100' 电缆，电线 多芯导线

15.625MHZ to 62.5MHZ, 1:4 LVCMOS/ LVTTL Zero Delay Clock Buffer

FEATURES • Four LVCMOS/LVTTL outputs, 7Ω typical output impedance • Single LVCMOS/LVTTL clock input • CLK accepts the following input levels: LVCMOS or LVTTL • Output frequency range: 15.625MHz to 62.5MHz • Input frequency range: 15.625MHz to 62.5MHz • VCO range: 250MHz to 500MHz • External

15.625MHZ to 62.5MHZ, 1:4 LVCMOS/ LVTTL Zero Delay Clock Buffer

FEATURES • Four LVCMOS/LVTTL outputs, 7Ω typical output impedance • Single LVCMOS/LVTTL clock input • CLK accepts the following input levels: LVCMOS or LVTTL • Output frequency range: 15.625MHz to 62.5MHz • Input frequency range: 15.625MHz to 62.5MHz • VCO range: 250MHz to 500MHz • External