Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

Low Skew,1-to-2 Differential-ToLVDS Fanout Buffer

The 85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels.The 85411 is characterized to operate from a 3.3V power supply. Guarantee • Two differential LVDS outputs\n• One differential CLK, nCLK clock input\n• CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL\n• Maximum output frequency: 650MHz\n• Translates any single ended input signal to LVDS levels with resistor bias on nCLK i;

Low Skew, 1-to-2 Different ial-to-LVDS Fanout Buffer

文件：230.58 Kbytes Page：15 Pages

丝印代码：85411AIL；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

丝印代码：85411AIL；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

丝印代码：85411ALF；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

丝印代码：85411ALF；Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

丝印代码：85411000；Diode 600 V 1.5A Surface Mount DO-214AC, SMA

Features Controlled avalanche characteristic High average forward current Compliant to RoHS (exemp. 7a), REACH, Conflict Minerals 1)

丝印代码：85411000；Diode 600 V 1.5A Surface Mount DO-214AC, SMA

Features Controlled avalanche characteristic High average forward current Compliant to RoHS (exemp. 7a), REACH, Conflict Minerals 1)

丝印代码：85411AIL；Low Skew, 1-to-2 Different ial-to-LVDS Fanout Buffer

文件：228.99 Kbytes Page：15 Pages

丝印代码：85411AIL；Low Skew, 1-to-2 Different ial-to-LVDS Fanout Buffer

文件：228.99 Kbytes Page：15 Pages

丝印代码：85411ALF；Low Skew, 1-to-2 Different ial-to-LVDS Fanout Buffer

文件：230.58 Kbytes Page：15 Pages

丝印代码：ICS54110AIL；2.5V Differential LVDS Clock Buffer

General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char

丝印代码：ICS54110AIL；2.5V Differential LVDS Clock Buffer

General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char

丝印代码：ICS54110AIL；2.5V Differential LVDS Clock Buffer

General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char

丝印代码：ICS54110AIL；2.5V Differential LVDS Clock Buffer

General Description The ICS854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The ICS854110I is char

2.5V Differential LVDS Clock Buffer

The 854110I is a high-performance differential LVDS clock fanout buffer. The device is designed for signal fanout of high-frequency, low phase-noise clock signals. The selected differential input signal is distributed to ten differential LVDS outputs. The 854110I is characterized to operate from a 2 ·Two differential input reference clocks\n·Differential pair can accept the following differential input levels: LVPECL, LVDS\n·Ten LVDS outputs\n·Maximum clock frequency: 200MHz\n·Output slew rate control\n·Fail-safe differential inputs\n·LVCMOS interface levels for all control inputs\n·Output skew;

Low Skew,1-to-2 Differential-ToLVDS Fanout Buffer

The 85411I is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels.The 85411I is characterized to operate from a 3.3V power supply. Guarant • Two differential LVDS outputs\n• One differential CLK, nCLK clock input\n• CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL\n• Maximum output frequency: 650MHz\n• Translates any single ended input signal to LVDS levels with resistor bias on nCLK i;

Low Skew, 1-to-2 Differential-to-LVDS Fanout Buffer

FEATURES • Two differential LVDS outputs • One differential CLK, nCLK clock input • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 650MHz • Translates any single ended input signal to LVDS levels with resistor

封装/外壳：32-VFQFN 裸露焊盘 包装：托盘 描述：IC CLK BUF 2:10 16MHZ 32VFQFPN 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：32-LQFP 包装：托盘 描述：IC CLK BUFFER 2:10 16MHZ 32TQFP 集成电路（IC） 时钟缓冲器，驱动器

Low Skew, 1-to-2 Different ial-to-LVDS Fanout Buffer

文件：228.99 Kbytes Page：15 Pages

Low Skew, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

GENERAL DESCRIPTION The ICS85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85411 is characterized to o

Low Skew, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

GENERAL DESCRIPTION The ICS85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85411 is characterized to o

Low Skew, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

GENERAL DESCRIPTION The ICS85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85411 is characterized to o

Low Skew, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

GENERAL DESCRIPTION The ICS85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85411 is characterized to o

Low Skew, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

GENERAL DESCRIPTION The ICS85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85411 is characterized to o