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85310AYI价格
参考价格:¥33.6094
型号:85310AYI-01LF 品牌:IDT 备注:这里有85310AYI多少钱,2025年最近7天走势,今日出价,今日竞价,85310AYI批发/采购报价,85310AYI行情走势销售排行榜,85310AYI报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL output pair • Two selectable differential input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to | RENESAS 瑞萨 | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL output pair • Two selectable differential input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to | RENESAS 瑞萨 | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL output pair • Two selectable differential input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to | RENESAS 瑞萨 | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL output pair • Two selectable differential input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to | RENESAS 瑞萨 | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL output pair • Two selectable differential input pairs • Differential CLKx, nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal t | RENESAS 瑞萨 | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL output pair • Two selectable differential input pairs • Differential CLKx, nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal t | RENESAS 瑞萨 | |||
LOW SKEW, DUAL, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER FEATURES • Two differential 2.5V/3.3V LVPECL / ECL bank outputs • Two differential clock input pairs • CLKx, nCLKx pairs can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to 3.3V | RENESAS 瑞萨 | |||
LOW SKEW, DUAL, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER FEATURES • Two differential 2.5V/3.3V LVPECL / ECL bank outputs • Two differential clock input pairs • CLKx, nCLKx pairs can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to 3.3V | RENESAS 瑞萨 | |||
Low Skew, Dual, 1-to-5, 2.5V/3.3V Differential-to-ECL/LVPECL Fanout Buffer FEATURES • Two differential 2.5V/3.3V LVPECL / ECL bank outputs • Two differential clock input pairs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to 3.3V | RENESAS 瑞萨 | |||
Low Skew, Dual, 1-to-5, 2.5V/3.3V Differential-to-ECL/LVPECL Fanout Buffer FEATURES • Two differential 2.5V/3.3V LVPECL / ECL bank outputs • Two differential clock input pairs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Translates any single ended input signal to 3.3V | RENESAS 瑞萨 | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer 文件:281.48 Kbytes Page:18 Pages | IDT | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer 文件:281.48 Kbytes Page:18 Pages | IDT | |||
封装/外壳:32-LQFP 包装:卷带(TR) 描述:IC CLK BUFFER 2:10 700MHZ 32TQFP 集成电路(IC) 时钟缓冲器,驱动器 | ETC 知名厂家 | ETC | ||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer 文件:281.48 Kbytes Page:18 Pages | IDT | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer 文件:281.48 Kbytes Page:18 Pages | IDT | |||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer 文件:289.78 Kbytes Page:18 Pages | IDT | |||
封装/外壳:32-LQFP 包装:卷带(TR) 描述:IC CLK BUFFER 2:10 700MHZ 32TQFP 集成电路(IC) 时钟缓冲器,驱动器 | ETC 知名厂家 | ETC | ||
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer 文件:289.78 Kbytes Page:18 Pages | IDT | |||
Panel Timing Controller 文件:440.87 Kbytes Page:29 Pages | NSC 国半 | |||
Panel Timing Controller 文件:440.87 Kbytes Page:29 Pages | NSC 国半 |
85310AYI产品属性
- 类型
描述
- 型号
85310AYI
- 制造商
Integrated Device Technology Inc
- 功能描述
CLOCK DRVR 20-OUT 32LQFP - Trays
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
IDT |
22+ |
32TQFP |
9000 |
原厂渠道,现货配单 |
|||
N/A |
24+ |
N/A |
16048 |
原厂可订货,技术支持,直接渠道。可签保供合同 |
|||
ICSI |
2450+ |
PLCC28 |
6540 |
只做原装正品假一赔十为客户做到零风险!! |
|||
MOLEX |
新 |
2213 |
全新原装 货期两周 |
||||
INTEGRATED |
23+ |
NA |
2860 |
原装正品代理渠道价格优势 |
|||
ICS |
16+ |
QFP |
2500 |
进口原装现货/价格优势! |
|||
INTEGRATE |
24+ |
NA |
6000 |
全新原装正品现货 假一赔佰 |
|||
Renesas Electronics America In |
25+ |
32-LQFP |
9350 |
独立分销商 公司只做原装 诚心经营 免费试样正品保证 |
|||
ICS |
22+ |
QFP |
20000 |
公司只有原装 品质保证 |
|||
IDT |
2025+ |
TQFP-32 |
3550 |
全新原厂原装产品、公司现货销售 |
85310AYI规格书下载地址
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DdatasheetPDF页码索引
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