10 (658(7x94)/38) AWG Bare Copper

文件：408.68 Kbytes Page：4 Pages

MLCH 3x3, 6mm2, SM, LC to LC

Properties • Pre-assembled plug & play cabling system • Ruggedised design with robust pulling tube

MLCH 3x3, 6mm2, SM, LC to LC

Properties • Pre-assembled plug & play cabling system • Ruggedised design with robust pulling tube

COAXIAL CONNECTOR, MXPM, 50 Ohm, Straight PCB jack (female)

Properties • Broadband electrical characteristics • 2.54 mm (0.1 inch) pitch centre-to-centre • Magnetic locking mechanism

COAXIAL CONNECTOR, MXPM, 50 Ohm, Straight PCB jack (female)

Properties • Broadband electrical characteristics • 2.54 mm (0.1 inch) pitch centre-to-centre • Magnetic locking mechanism

Duplex_SC-SC_UPC_2.0mm_yellow_SM/A2

Properties • One-piece design for easy and quick termination • Push-pull connector

Duplex_LC unib. XD-LC unib. XD_UPC/APC_2.1mm_yellow_SM/A2

Properties • One-piece design for easy and quick termination • Push-pull mechanism for best handling and high packing density • Very short rigid length

Duplex_LC unib. XD-LC unib. XD_UPC/APC_2.1mm_yellow_SM/A2

Properties • One-piece design for easy and quick termination • Push-pull mechanism for best handling and high packing density • Very short rigid length

MLUH 3x3, 10mm2, SM, Q-ODC-2 to LC

Properties • A solution which is vendor agnostic • Installer friendly and field proof

Low Skew, 1-to-4, Differential/LVCMOS-to- 0.7V HCSL Fanout Buffer

FEATURES • Four 0.7V differential HCSL outputs • Selectable differential CLK0, nCLK0 or LVCMOS inputs • CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL • CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 5

Low Skew, 1-to-4, Differential/LVCMOS-to- 0.7V HCSL Fanout Buffer

FEATURES • Four 0.7V differential HCSL outputs • Selectable differential CLK0, nCLK0 or LVCMOS inputs • CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL • CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 5

Low Skew, 1-to-4, Differential/LVCMOS-to- 0.7V HCSL Fanout Buffer

FEATURES • Four 0.7V differential HCSL outputs • Selectable differential CLK0, nCLK0 or LVCMOS inputs • CLK0, nCLK0 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL • CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 5

包装：线轴 描述：CABLE 4COND 10AWG BLACK 100' 电缆，电线 多芯导线

包装：散装 描述：COUNTER 5 CHAR 5-110V PANEL MT 工业自动化与控制 面板仪表 - 计数器，小时表

Low Skew, 1-to-4, Differential/LVCMOS-to- 0.7V HCSL Fanout Buffer

文件：222.43 Kbytes Page：17 Pages

时钟缓冲器 DIFFERENTIAL CLOCK

Low Skew, 1-to-4, Differential/LVCMOS-to- 0.7V HCSL Fanout Buffer

文件：222.43 Kbytes Page：17 Pages

10 (658(7x94)/38) AWG Bare Copper

文件：409.72 Kbytes Page：4 Pages

Low Skew, 1-to-4, Differential/LVCMOS-to- 0.7V HCSL Fanout Buffer

文件：222.43 Kbytes Page：17 Pages

Low Skew,1-to-4 Differential/LVCMOS-to-0.7V HCSL Fanout Buffer