CMOS 4-Bit Latch/4-to-16 Line Decoders

Features: ® Strobed input latch ® Inhibit contral u 100% tested for quiescent current at 20 V ® Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C u Noise margin (over full package temper- ature range): 1VatVpp= 5V 2VatVpp=10V 25VatVpp

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

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Cmos 4-Bit Latch/4-to-16 Line Decoders

文件：1.026599 Mbytes Page：15 Pages

CMOS 4-Bit Latch 4-to-16 Line Decoders

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CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：995.38 Kbytes Page：15 Pages