Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V en

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 and 5 V enviro

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

Dual Schmitt-Trigger Buffer

Features + Operate From 1.65V to 5.5 5 V tolerant inputioutput for interfacing with 5 V logic. « £24mA output drive (Vee = 3.3V) ‘+ CMOS low-power consumption and high noise immunity « cer Supports Partial-Power-Down Mode Operation + Latoh-up performance exceeds 100mA + Specified fiom -40 °

Dual non-inverting Schmitt-trigger with 5 V tolerant input

Dual Buffer with Schmitt-Trigger

Dual-gate

Dual non-inverting Schmitt trigger with 5 V tolerant input

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

Dual Schmitt-Trigger Buffer

Features + Operate From 1.65V to 5.5 5 V tolerant inputioutput for interfacing with 5 V logic. « £24mA output drive (Vee = 3.3V) ‘+ CMOS low-power consumption and high noise immunity « cer Supports Partial-Power-Down Mode Operation + Latoh-up performance exceeds 100mA + Specified fiom -40 °

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V en

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V en

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 and 5 V enviro

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17-Q100 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down appli

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 and 5 V enviro

Dual non-inverting Schmitt-trigger with 5 V tolerant input

DESCRIPTION The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 V and 5 V en

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17-Q100 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down

Dual non-inverting Schmitt trigger with 5 V tolerant input

1. General description The 74LVC2G17-Q100 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

DUAL SCHMITT TRIGGER BUFFER

Description The 74LVC2G17 is a dual Schmitt trigger buffer gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully spe

Dual Schmitt-Trigger Buffer

Features + Operate From 1.65V to 5.5 5 V tolerant inputioutput for interfacing with 5 V logic. « £24mA output drive (Vee = 3.3V) ‘+ CMOS low-power consumption and high noise immunity « cer Supports Partial-Power-Down Mode Operation + Latoh-up performance exceeds 100mA + Specified fiom -40 °

封装/外壳：6-XFDFN 包装：卷带（TR） 描述：IC BUFFER NON-INVERT 5.5V 6DFN 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：6-XFDFN 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUFFER NON-INVERT 5.5V 6DFN 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input

Dual non-inverting Schmitt trigger with 5 V tolerant input