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Single D-type flip-flop; positive-edge trigger

DESCRIPTION The 74LVC1G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. F

Panasonic

松下

Single D-type flip-flop; positive-edge trigger

ETC

知名厂家

Single D-type flip-flop; positive-edge trigger

1. General description The 74LVC1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be drive

NEXPERIANexperia B.V. All rights reserved

安世安世半导体(中国)有限公司

Single D-type flip-flop; positive-edge trigger

ETC

知名厂家

Single D-type flip-flop; positive-edge trigger

ETC

知名厂家

更新时间:2025-8-16 20:00:01
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