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74HCT377D价格

参考价格:¥1.1313

型号:74HCT377D,652 品牌:NXP 备注:这里有74HCT377D多少钱,2026年最近7天走势,今日出价,今日竞价,74HCT377D批发/采购报价,74HCT377D行情走势销售排行榜,74HCT377D报价。
型号 功能描述 生产厂家 企业 LOGO 操作
74HCT377D

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

74HCT377D

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LO

NEXPERIA

安世

74HCT377D

Octal D-type flip-flop with data enable; positive-edge trigger

The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transit • Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC377: CMOS level\n• For 74HCT377: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package;

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

Octal D-type flip-flop with data enable; positive-edge trigger

The 74HC377‑Q100; 74HCT377‑Q100 is an octal positive‑edge triggered D‑type flip‑flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW‑to‑HIGH clock (C • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Input levels:• For 74HC377-Q100: CMOS level\n• For 74HCT377-Q100: TTL level\n\n• Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• C;

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

The 74HC377‑Q100; 74HCT377‑Q100 is an octal positive‑edge triggered D‑type flip‑flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW‑to‑HIGH clock (C • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Input levels:• For 74HC377-Q100: CMOS level\n• For 74HCT377-Q100: TTL level\n\n• Common clock and master reset\n• Eight positive edge-triggered D-type flip-flops\n• C;

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

1. General description The 74HC377-Q100; 74HCT377-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements

NEXPERIA

安世

封装/外壳:20-SOIC(0.295",7.50mm 宽) 功能:标准 包装:管件 描述:IC FF D-TYPE SNGL 8BIT 20SO 集成电路(IC) 触发器

ETC

知名厂家

封装/外壳:20-SSOP(0.209",5.30mm 宽) 功能:标准 包装:管件 描述:IC FF D-TYPE SNGL 8BIT 20SSOP 集成电路(IC) 触发器

ETC

知名厂家

Octal D-type flip-flop with data enable; positive-edge trigger

文件:721.41 Kbytes Page:18 Pages

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

文件:721.41 Kbytes Page:18 Pages

NEXPERIA

安世

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

Octal D-type flip-flop with data enable; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT377 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Ideal for addressable register applications • Data enable for address and data s

PHILIPS

飞利浦

74HCT377D产品属性

  • 类型

    描述

  • VCC (V):

    4.5 - 5.5

  • Logic switching levels:

    TTL

  • Output drive capability (mA):

    ± 6

  • tpd (ns):

    14

  • fmax (MHz):

    53

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    80

  • Ψth(j-top) (K/W):

    22.7

  • Rth(j-c) (K/W):

    56

  • Package name:

    SO20

更新时间:2026-5-22 17:30:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
PHI
23+
SOP20
3000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
PHI
25+
SOP
3000
全新原装、诚信经营、公司现货销售
恩XP
24+
N/A
25843
公司原厂原装现货假一罚十!特价出售!强势库存!
PHI
23+
SMD-SO20L
9856
原装正品,假一罚百!
PHI
25+23+
28554
绝对原装正品全新进口深圳现货
PHI
NA
8560
一级代理 原装正品假一罚十价格优势长期供货
Nexperia
25+
SSOP-20
20948
样件支持,可原厂排单订货!
Nexperia USA Inc.
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
PHI
24+
SOP-207.2mm
1200
恩XP
2026+
SSOP2
54648
百分百原装现货 实单必成 欢迎询价

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