Dual 4-input NAND gate

1. General description The 74HC20 is a dual 4-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • CMOS low power dissipatio

Dual 4-input NAND gate

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC GATE NAND 2CH 4-INP 14TSSOP 集成电路（IC） 门和反相器

Dual 4-input NAND gate

Dual 4-input NAND gate

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封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC GATE NAND 2CH 4-INP 14TSSOP 集成电路（IC） 门和反相器

Dual 4-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function. FEATURES • Output capability: standard • I

Dual 4-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function. FEATURES • Output capability: standard • I

DUAL 4-INPUT NAND GATE

DESCRIPTION The M54/74HC20 is a high speed CMOS DUAL 4-INPUT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION I

DUAL 4-INPUT NAND GATE

DESCRIPTION The M54/74HC20 is a high speed CMOS DUAL 4-INPUT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION I

DUAL 4-INPUT NAND GATE

DESCRIPTION The M54/74HC20 is a high speed CMOS DUAL 4-INPUT NAND GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION I