Triple 3-input AND gate

GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES • Output capability: standard • ICC categor

Triple 3-input AND gate

Triple 3-input AND gate

General description The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC11; 74HCT11 provides a triple 3-input AND function.

Triple 3-input AND gate

The 74HC11; 74HCT11 is a triple 3-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. • Complies with JEDEC standard no. 7A:\n• Input levels:• For 74HC11: CMOS level\n• For 74HCT11: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from -40 °C to +85 °C and from -40 °C to +125 °C;

封装/外壳：14-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC GATE AND 3CH 3-INP 14SSOP 集成电路（IC） 门和反相器

封装/外壳：14-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC GATE AND 3CH 3-INP 14SSOP 集成电路（IC） 门和反相器

Triple 3-input AND gate

GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES • Output capability: standard • ICC categor

Triple 3-input AND gate

GENERAL DESCRIPTION The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3-input AND function. FEATURES • Output capability: standard • ICC categor

TRIPLE 3-INPUT AND GATE

DESCRIPTION The M74HC11 is an high speed CMOS TRIPLE 3-INPUT AND GATE fabricated with silicon gate C2MOS technology. ■ HIGH SPEED: tPD = 9ns (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETR

High Speed CMOS Logic Triple 3-Input AND Gate

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