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CD74HC11价格

参考价格：￥1.5426

型号：CD74HC112E 品牌：TI 备注：这里有CD74HC11多少钱，2026年最近7天走势，今日出价，今日竞价，CD74HC11批发/采购报价，CD74HC11行情走势销售排行榜，CD74HC11报价。

型号	功能描述	生产厂家企业	LOGO
CD74HC11	CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si	TI 德州仪器	TI
CD74HC11	3 通道、3 输入、2V 至 6V 与门 This device contains three independent 3-input AND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. • Buffered inputs\n• Wide operating voltage range: 2 V to 6 V\n• Wide operating temperature range: –55°C to +125°C\n• Supports fanout up to 10 LSTTL loads\n• Significant power reduction compared to LSTTL logic ICs;	TI 德州仪器	TI
CD74HC11	High Speed CMOS Logic Triple 3-Input AND Gate 文件：33.84 Kbytes Page：6 Pages	TI 德州仪器	TI
CD74HC11	High-Speed CMOS Logic Triple 3-Input AND Gate 文件：260.86 Kbytes Page：11 Pages	TI 德州仪器	TI
CD74HC112E	丝印代码：CD74HC112E；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC11E	丝印代码：CD74HC11E；CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si	TI 德州仪器	TI
CD74HC11E.A	丝印代码：CD74HC11E；CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si	TI 德州仪器	TI
CD74HC112	具有设置和复位端的高速 CMOS 逻辑双路负边沿触发式 J-K 触发器 The HC112 and HCT112 utilize silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.\n\n These flip-flops have independent J, K, Set, Reset, a • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times\n• Complementary Outputs\n• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C\n• Standard Outputs . . . . . 10 LSTTL Loads\n• Wide Operating Temperature Range . . . –55°C to 125°C\n• Significant Pow;	TI 德州仪器	TI
CD74HC112	CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC112M96	丝印代码：HC112M；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC112MT	丝印代码：HC112M；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC112NS	丝印代码：HC112M；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC112NSR	丝印代码：HC112M；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC112PW	CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC112PWR	丝印代码：HJ112；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC112PWRE4	丝印代码：HJ112；CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger 1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output	TI 德州仪器	TI
CD74HC11M	丝印代码：HC11M；CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si	TI 德州仪器	TI
CD74HC11M96	丝印代码：HC11M；CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si	TI 德州仪器	TI
CD74HC11M96.A	丝印代码：HC11M；CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si	TI 德州仪器	TI
CD74HC11M96G4.A	丝印代码：HC11M；CDx4HC11 Triple 3-Input AND Gates 1 Features • Buffered inputs • Wide operating voltage range: 2 V to 6 V • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Combining power good signals • Enable digital si	TI 德州仪器	TI
CD74HC112	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：55.1 Kbytes Page：8 Pages	TI 德州仪器	TI
CD74HC112	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages	TI 德州仪器	TI
CD74HC112	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112E	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：765.86 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112E	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages	TI 德州仪器	TI
CD74HC112E	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：55.1 Kbytes Page：8 Pages	TI 德州仪器	TI
CD74HC112E	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112E	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112EE4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112M96	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112M96	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：765.86 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112M96	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112M96	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages	TI 德州仪器	TI
CD74HC112M96	封装/外壳：16-SOIC（0.154"，3.90mm 宽）功能：设置（预设）和复位包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC）触发器	TI 德州仪器	TI
CD74HC112M96E4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112M96G4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112MT	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：765.86 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112MT	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112MT	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112MT	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages	TI 德州仪器	TI
CD74HC112MT	封装/外壳：16-SOIC（0.154"，3.90mm 宽）功能：设置（预设）和复位包装：管件描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC）触发器	TI 德州仪器	TI
CD74HC112MTE4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112MTG4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112NSR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112NSR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112NSR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages	TI 德州仪器	TI
CD74HC112NSR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：765.86 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112NSRE4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112NSRG4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112PW	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112PW	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：765.86 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112PW	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112PW	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages	TI 德州仪器	TI
CD74HC112PWE4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112PWG4	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112PWR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：643.79 Kbytes Page：18 Pages	TI 德州仪器	TI
CD74HC112PWR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：346.89 Kbytes Page：13 Pages	TI 德州仪器	TI
CD74HC112PWR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：765.86 Kbytes Page：20 Pages	TI 德州仪器	TI
CD74HC112PWR	Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger 文件：757.59 Kbytes Page：20 Pages	TI 德州仪器	TI

CD74HC11产品属性

类型
描述
Supply voltage (Min) (V)：
2
Supply voltage (Max) (V)：
6
Number of channels (#)：
3
Inputs per channel：
3
IOL (Max) (mA)：
5.2
IOH (Max) (mA)：
-5.2
Input type：
Standard CMOS
Output type：
Push-Pull
Features：
High speed (tpd 10- 50ns)
Data rate (Max) (Mbps)：
28
Rating：
Catalog
Operating temperature range (C)：
-55 to 125

CD74HC11供应商更多...

更新时间：2026-5-14 22:59:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳市高捷芯城科技有限公司	CD74HC112M	TI	25+	SOIC-16	7786	正规渠道,免费送样。支持账期,BOM一站式配齐	询价
深圳市得捷芯城科技有限公司	CD74HC112M96	TI	25+	SOIC-16	4658	原装正品现货,原厂订货,可支持含税原型号开票。	询价
深圳市凌旭科技有限公司	CD74HC112PWR	TI	2016+	TSSOP16	3900	只做原装,假一罚十,公司可开17%增值税发票!	询价
上海意淼电子科技有限公司	CD74HC11M	HAR	23+	NA	20000	全新原装假一赔十	询价
深圳市斌能达电子科技有限公司	CD74HC11E	TI/德州仪器	24+	PDIP-14	6000	全新原装深圳仓库现货有单必成	询价
中天科工半导体（深圳）有限公司	CD74HC11M	TI	20+	原装	65790	原装优势主营型号-可开原型号增税票	询价
深圳市联世界科技有限公司	CD74HC11E	HARRIS	24+/25+		23	原装正品现货库存价优	询价
深圳市昌和盛利电子有限公司	CD74HC112M96	TI/TEXAS	26+	SOIC16	8931	代理全系列销售, 全新原装正品,价格优势,长期供应,量大可订	询价
深圳市华康联电子科技有限公司	CD74HC11MT	TI	23+	NA	20000		询价
深圳市腾亿芯科技有限公司	CD74HC11E	TI/德州仪器	25+	PDIP-14	20000	原装	询价

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热门搜索： 74HC CMOS缓冲器和线路驱动器，SC70-6 SMD / SMT + 125 C-55 C同相缓冲器和线路驱动器，2输入2输出同相5.5 V 4.5 V缓冲器和线路驱动器，4输入4输出-32 mA缓冲器和线路驱动器，16输入16输出缓冲器和线路驱动器，10 uA 2输入2输出-32 mA 32 mA缓冲器和线路驱动器
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找IC，尽在114IC

CD74HC11价格

CD74HC11产品属性

CD74HC11供应商更多...

CD74HC11芯片相关品牌

CD74HC11规格书下载地址

CD74HC11参数引脚图相关

CD74HC11数据表相关新闻

CD74HC259MT

CD74HC123PWR

CD74HC125M

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CD54HCT4060F3A

CD54HCT541F3A

DdatasheetPDF页码索引