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74HC109D价格

参考价格:¥0.5869

型号:74HC109D,652 品牌:NXP 备注:这里有74HC109D多少钱,2026年最近7天走势,今日出价,今日竞价,74HC109D批发/采购报价,74HC109D行情走势销售排行榜,74HC109D报价。
型号 功能描述 生产厂家 企业 LOGO 操作
74HC109D

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

PHILIPS

飞利浦

74HC109D

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of

NEXPERIA

安世

74HC109D

Dual JK flip-flop with set and reset; positive-edge-trigger

The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock i • Input levels:• For 74HC109: CMOS level\n• For 74HCT109: TTL level\n\n• J and K inputs for easy D-type flip-flop\n• Toggle flip-flop or \"do nothing\" mode\n• Specified in compliance with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n;

NEXPERIA

安世

Dual JK flip-flop with set and reset; positive-edge-trigger

The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock i • Input levels:• For 74HC109: CMOS level\n• For 74HCT109: TTL level\n\n• J and K inputs for easy D-type flip-flop\n• Toggle flip-flop or \"do nothing\" mode\n• Specified in compliance with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n;

NEXPERIA

安世

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

PHILIPS

飞利浦

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and

NEXPERIA

安世

Dual JK flip-flop with set and reset; positive-edge-trigger

The 74HC109-Q100; 74HCT109-Q100 is a dual positive edge triggered JK flip-flop featuring individual nJ and nK inputs. It has clock (nCP) inputs, set (nSD) and reset (nRD) inputs and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of t • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC109-Q100: CMOS level\n• For 74HCT109-Q100: TTL level\n\n• J and K inputs for easy D-type flip-flop\n• Toggle flip-flop or \"do nothing\" mo;

NEXPERIA

安世

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC FF JK TYPE DUAL 1BIT 16SO 集成电路(IC) 触发器

ETC

知名厂家

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:管件 描述:IC FF JK TYPE DUAL 1BIT 16SO 集成电路(IC) 触发器

ETC

知名厂家

Dual JK flip-flop with set and reset; positive-edge-trigger

文件:799.3 Kbytes Page:17 Pages

NEXPERIA

安世

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

PHILIPS

飞利浦

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

PHILIPS

飞利浦

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

PHILIPS

飞利浦

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M54/74HC109 is a high speed CMOS DUAL JK FLIP-FLOP WITH PRESET AND CLEAR fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 63 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 2

STMICROELECTRONICS

意法半导体

74HC109D产品属性

  • 类型

    描述

  • VCC (V):

    2.0 - 6.0

  • Logic switching levels:

    CMOS

  • Output drive capability (mA):

    ± 5.2

  • tpd (ns):

    15

  • fmax (MHz):

    75

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    86

  • Ψth(j-top) (K/W):

    6.6

  • Rth(j-c) (K/W):

    44

  • Package name:

    SO16

更新时间:2026-5-18 22:59:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
恩XP
24+
标准封装
17048
全新原装正品/价格优惠/质量保障
PHSSEMICONDUCTOR
24+
NA
80000
只做自己库存 全新原装进口正品假一赔百 可开13%增
NEXPERIA/安世
25+
SOT109-1
600000
NEXPERIA/安世全新特价74HC109D-Q100J即刻询购立享优惠#长期有排单订
恩XP
25+
SO-19
78900000
原厂原装正品现货
PHIL
24+/25+
494
原装正品现货库存价优
PHI
2450+
SOP16
6885
只做原装正品假一赔十为客户做到零风险!!
恩XP
2223+
SOP
26800
只做原装正品假一赔十为客户做到零风险
恩XP
23+
NA
20094
正纳10年以上分销经验原装进口正品做服务做口碑有支持
恩XP
25+
TSSOP-20
30000
原装正品公司现货,假一赔十!
恩XP
23+
9865
原装正品,假一赔十

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