Low Skew 1 to 2 Clock Buffer

Features • Low additive phase jitter RMS: 50fs • Extremely low skew outputs (50ps) • Low cost clock buffer • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free • Input/Output clock frequency up to 200 MHz • Low power CMOS technology • Operating voltages of 1.8V to 3.3V • Extended temperature ra

Low additive phase jitter RMS

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Low Skew 1 to 2 Clock Buffer

Low Skew 1 to 2 Clock Buffer

Features • Low additive phase jitter RMS: 50fs • Extremely low skew outputs (50ps) • Low cost clock buffer • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free • Input/Output clock frequency up to 200 MHz • Low power CMOS technology • Operating voltages of 1.8V to 3.3V • Extended temperature ra

Low Skew 1 to 2 Clock Buffer

Features • Low additive phase jitter RMS: 50fs • Extremely low skew outputs (50ps) • Low cost clock buffer • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free • Input/Output clock frequency up to 200 MHz • Low power CMOS technology • Operating voltages of 1.8V to 3.3V • Extended temperature ra

Low Skew 1 to 2 Clock Buffer

Features • Low additive phase jitter RMS: 50fs • Extremely low skew outputs (50ps) • Low cost clock buffer • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free • Input/Output clock frequency up to 200 MHz • Low power CMOS technology • Operating voltages of 1.8V to 3.3V • Extended temperature ra

Low Skew 1 to 2 Clock Buffer

Features • Low additive phase jitter RMS: 50fs • Extremely low skew outputs (50ps) • Low cost clock buffer • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free • Input/Output clock frequency up to 200 MHz • Low power CMOS technology • Operating voltages of 1.8V to 3.3V • Extended temperature ra

封装/外壳：8-UFDFN 包装：管件 描述：COL 2.00X2.00X0.50 MM, 0.50MM PI 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：托盘 描述：MULTIMKT-TIMING 集成电路（IC） 时钟缓冲器，驱动器

3.3V CMOS 1-TO-2 CLOCK DRIVER

FEATURES: • Advanced CMOS Technology • Guaranteed low skew

3.3V CMOS 1-TO-2 CLOCK DRIVER

DESCRIPTION: The FCT38072 is a 3.3V clock driver built using advanced CMOS technology. This low skew clock driver offers 1:2 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce