Hex D flip-flops

DESCRIPTION The 74F174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup ti

Hex D-Type Flip-Flop with Master Reset

General Description The 74F174 is a high-speed hex D-type flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear

Hex D-Type Flip-Flop with Master Reset

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Hex D Flip-Flop with Master Reset

文件：166.34 Kbytes Page：8 Pages

Hex D Flip-Flop with Master Reset

文件：166.34 Kbytes Page：8 Pages