位置：首页 > IC中文资料第2387页 > 74ALVT16823DG
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
18-bit bus-interface D-type flip-flop with reset and enable 3-State DESCRIPTION The 74ALVT16823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge | PHILIPS 飞利浦 |   | ||
18-bit bus-interface D-type flip-flop with reset and enable; 3-state 1. General description The 74ALVT16823 is an 18-bit positive-edge triggered D-type flip-flop with 3-state outputs, reset and enable. The device can be used as two 9-bit flip-flops or one 18-bit flip-flop. The device features clock (nCP), clock enable (nCE), master reset (nMR) and output enable | NEXPERIA 安世 | | ||
18-bit bus-interface D-type flip-flop with reset and enable; 3-state | NEXPERIA 安世 | | ||
封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE DUAL 9BIT 56TSSOP 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE DUAL 9BIT 56TSSOP 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
18-bit bus-interface D-type flip-flop with reset and enable; 3-state 1. General description The 74ALVT16823 is an 18-bit positive-edge triggered D-type flip-flop with 3-state outputs, reset and enable. The device can be used as two 9-bit flip-flops or one 18-bit flip-flop. The device features clock (nCP), clock enable (nCE), master reset (nMR) and output enable | NEXPERIA 安世 | | ||
18-bit bus-interface D-type flip-flop with reset and enable 3-State DESCRIPTION The 74ALVT16823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge | PHILIPS 飞利浦 | | ||
18-bit bus-interface D-type flip-flop with reset and enable 3-State DESCRIPTION The 74ALVT16823 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge | PHILIPS 飞利浦 | |
74ALVT16823DG产品属性
- 类型
描述
- 型号
74ALVT16823DG
- 功能描述
触发器 18-BIT BUS INTERFACE 3S
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Nexperia(安世) |
2021+ |
TSSOP-56 |
499 |
||||
恩XP |
21+ |
SO-20 |
8080 |
只做原装,质量保证 |
|||
恩XP |
2450+ |
TSSOP |
9850 |
只做原装正品现货或订货假一赔十! |
|||
恩XP |
25+ |
SOP |
3200 |
全新原装、诚信经营、公司现货销售 |
|||
恩XP |
25+ |
SO-20 |
30000 |
原装正品公司现货,假一赔十! |
|||
恩XP |
25+ |
TSSOP56 |
1476 |
原装现货,免费供样,技术支持,原厂对接 |
|||
恩XP |
23+ |
TSSOP |
3544 |
原厂授权代理,海外优势订货渠道。可提供大量库存,详 |
|||
NEXPERIA/安世 |
25+ |
SOT364-1 |
600000 |
NEXPERIA/安世全新特价74ALVT16823DGGS即刻询购立享优惠#长期有排单订 |
|||
24+ |
N/A |
82000 |
一级代理-主营优势-实惠价格-不悔选择 |
||||
NEXPERIA/安世 |
2025+ |
5000 |
原装进口价格优 请找坤融电子! |
74ALVT16823DG芯片相关品牌
74ALVT16823DG规格书下载地址
74ALVT16823DG参数引脚图相关
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- 74AHC32
- 74AHC30
- 74AHC2G
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- 74AHC04
74ALVT16823DG数据表相关新闻
74AHCU04PW-Q100J
进口代理
2023-9-2874AUP1G74GS,115
品 牌： Nexperia(安世) 厂家型号： 74AUP1G74GS,115 商品编号： C545889 封装： XSON-8(1x1.4) 数据手册： 下载文件 商品毛重： 0.017克(g) 包装方式： 编带
2023-7-1074AUP1G07GW,125
https://hfx03.114ic.com/
2022-3-874AHCT1G125GW Nexperia 20+ 5000 SOT353
74AHCT1G125GW Nexperia20+5000SOT353
2022-3-274AUP1G08GX只做原装现货绝不虚报
焕盛达竭诚为您提供一站式配套服务。当天下单，当天发货；
2020-9-3074ALVCH32973ZKER
74ALVCH32973ZKER，全新原装当天发货或门市自取0755-82732291.
2020-4-5
DdatasheetPDF页码索引
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