8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74AHC/AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The s

8-bit serial-in/serial-out or parallel-out shift register with output latches

1. General description The 74AHC595; 74AHCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading

standard-logic

The 74AHCT595 is an advanced high speed CMOS device\nthat is designed to be pin compatable with 74LS low power\nSchottky types.\nAn eight bit shift register accpets data from the serial input\n(DS) on each positive transition of the shift register clock\n(STCP). When asserted low the reset function

8-Bit Serial-In/Serial-Out or Parallel-Out Shift Register with Output Latches

The 74AHCT595 is an 8-bit serial-in/serial-out or parallel-out shift register with output latches designed for 4.5V to 5.5V VCC operation.\nThe device integrates an 8-bit shift register and an 8-bit D-type storage register. The storage register features parallel 3-state outputs. The shift register p • Supply Voltage Range: 4.5V to 5.5V\n\n• +8mA/-8mA Output Current\n\n• Direct Clear Input of Shift Register\n\n• Inputs are Compatible with TTL-Voltage\n\n• Latch-up Performance (> 100mA) Meets JESD 78, Class II Standard\n\n• -40℃ to +125℃ Operating Temperature Range\n\n• Available in Green TSSOP-1;

NPN general-purpose double transistors output latches; 3-state

8-BIT SHIFT REGISTER 8-BIT OUTPUT REGISTER

文件：255.08 Kbytes Page：10 Pages

8-bit serial-in/serial-out or parallel-out shift register with output latches

1. General description The 74AHC595; 74AHCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading

8-bit serial-in/serial-out or parallel-out shift register with output latches

The 74AHC595-Q100; 74AHCT595-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.\n The 74AHC595-Q100; 74AHCT595-Q100 are 8-stage serial shift registers with a storage register and 3-state • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt trigger action\n• Inputs accept voltages higher than VCC\n• Input levels:• The 74AHC595-Q100 operates with ;

8-bit serial-in/serial-out or parallel-out shift register with output latches

1. General description The 74AHC595; 74AHCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74AHC/AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The s

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74AHC/AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The s

8-bit serial-in/serial-out or parallel-out shift register with output latches

1. General description The 74AHC595; 74AHCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading

NPN general-purpose double transistors output latches; 3-state

8-bit serial-in/serial-out or parallel-out shift register with output latches

文件：794.74 Kbytes Page：22 Pages

封装/外壳：16-VFQFN 裸露焊盘 功能：串行至并行，串行 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SHIFT REG 8BIT SER 16DHVQFN 集成电路（IC） 移位寄存器

NPN general-purpose double transistors output latches; 3-state

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：串行至并行，串行 包装：管件 描述：IC 8BIT SHFT REGSTR 3-ST 16SOIC 集成电路（IC） 移位寄存器

8-bit serial-in/serial-out or parallel-out shift register with output latches

文件：794.74 Kbytes Page：22 Pages

NPN general-purpose double transistors output latches; 3-state

8-bit serial-in/serial-out or parallel-out shift register with output latches

文件：794.74 Kbytes Page：22 Pages

8-bit serial-in/serial-out or parallel-out shift register with output latches

文件：794.74 Kbytes Page：22 Pages

8-BIT SHIFT REGISTER 8-BIT OUTPUT REGISTER

文件：255.08 Kbytes Page：10 Pages

8-BIT SHIFT REGISTER 8-BIT OUTPUT REGISTER

文件：255.08 Kbytes Page：10 Pages

8-BIT SHIFT REGISTER 8-BIT OUTPUT REGISTER

文件：255.08 Kbytes Page：10 Pages

8-BIT SHIFT REGISTER 8-BIT OUTPUT REGISTER

文件：255.08 Kbytes Page：10 Pages

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：415.48 Kbytes Page：16 Pages

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：415.48 Kbytes Page：16 Pages