| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74ACT109SC | Dual JK Positive Edge-Triggered Flip-Flop General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti | FAIRCHILD 仙童半导体 |   | |
74ACT109SC | Dual JK Positive Edge-Triggered Flip-Flop Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav | ONSEMI 安森美半导体 | | |
74ACT109SC | 封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | |
74ACT109SC | Dual JK Positive Edge-Triggered Flip-Flop 文件：339.62 Kbytes Page：12 Pages | FAIRCHILD 仙童半导体 | | |
74ACT109SC | IC FF JK TYPE DUAL 1BIT 16SOIC | ONSEMI 安森美半导体 | | |
IC FF JK TYPE DUAL 1BIT 16SOIC | ONSEMI 安森美半导体 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | | ||
Dual JK Positive Edge?뭈riggered Flip?묯lop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J | ONSEMI 安森美半导体 | |
74ACT109SC产品属性
- 类型
描述
- 类型：
JK 型
- 输出类型：
差分
- 元件数：
2
- 每元件位数：
1
- 时钟频率：
210MHz
- 不同 V，最大 CL 时的最大传播延迟：
11ns @ 5V，50pF
- 触发器类型：
正边沿
- 电流 - 输出高，低：
24mA，24mA
- 电压 - 电源：
4.5 V ~ 5.5 V
- 电流 - 静态（Iq)：
20µA
- 输入电容：
4.5pF
- 工作温度：
-40°C ~ 85°C（TA）
- 安装类型：
表面贴装
- 封装/外壳：
16-SOIC（0.154\，3.90mm 宽）
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NS/国半 |
22+ |
SOP |
8000 |
原装正品支持实单 |
|||
FSC |
25+ |
SOP3.9 |
62 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
Fairchild Semiconductor |
24+25+ |
16500 |
全新原厂原装现货!受权代理!可送样可提供技术支持! |
||||
Fairchild(飞兆/仙童) |
26+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
|||
Fairchild/ON |
22+ |
16SOIC |
9000 |
原厂渠道,现货配单 |
|||
FAIRCHILD |
7 |
SOP |
2318 |
全新 发货1-2天 |
|||
FAIRCHIL |
25+23+ |
SOPPB |
37689 |
绝对原装正品全新进口深圳现货 |
|||
NS |
24+ |
3.9mm16 |
16400 |
全新现货 |
|||
Fairchild |
26+ |
16-SOIC |
9526 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
nsc |
26+ |
N/A |
6980 |
原装现货,可开13%税票 |
74ACT109SC芯片相关品牌
74ACT109SC规格书下载地址
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74ACT109SC数据表相关新闻
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DdatasheetPDF页码索引
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