丝印代码：73034AIL；Low Skew, ÷2, ÷4, ÷8 Differential-to-LVPECL Clock Divider

Features • ÷2, ÷4 and ÷8 clock frequency divider • Three differential LVPECL output pairs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, LVDS, CML • VBB bias voltage generator supports single-ended LVPECL clock input

丝印代码：73034AIL；Low Skew, ÷2, ÷4, ÷8 Differential-to-LVPECL Clock Divider

Features • ÷2, ÷4 and ÷8 clock frequency divider • Three differential LVPECL output pairs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, LVDS, CML • VBB bias voltage generator supports single-ended LVPECL clock input

MMCX PLUG STRAIGHT SEMI-RIGID, RG402

文件：132.35 Kbytes Page：2 Pages

丝印代码：7MP；4-Line Ultra Low Capacitance TVS Diode Array

Features • Ultra low capacitance: 0.25pF typical(IO/ to I/O) • Low operating voltage: 3.3V • Low clamping voltage • Up to 4 lines protects • Leadless flow-through package • Complies with following standards: - IEC 61000-4-2 (ESD) immunity test Air discharge: ±25kV Contact discharge: ±20kV