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位置：首页 > IC中文资料第1115页 > 7236

7236价格

参考价格：￥1.7499

型号：7236 品牌：Weller 备注：这里有7236多少钱，2025年最近7天走势，今日出价，今日竞价，7236批发/采购报价，7236行情走势销售排行榜，7236报价。
型号 功能描述 生产厂家 企业 LOGO 操作
7236

T-1 Subminiature Lamps

T-1 Subminiature Lamps T-1 Subminiature Short Type Lamps

GILWAY

7236

AUDIO Coupling Transformer

文件：146.45 Kbytes Page：1 Pages

FILTRAN

费尔兰特

7236

包装：散装 描述：JACK SCREW HEX 4-40 连接器，互连器件 D-Sub，D 形连接器顶丝

KEYSTONE

Keystone Electronics Corp.

7236

包装：散装 描述：JACK SCREW HEX 4-40 连接器，互连器件 D-Sub，D 形连接器顶丝

KEYSTONE

Keystone Electronics Corp.

7236

3M??Scotch-Weld??7236 B/A

文件：397.03 Kbytes Page：3 Pages

3M

723611L15PFG

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723611L15PFGI

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723611L15PQFG

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723611L15PQFGI

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723611L20PFG

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723611L20PFGI

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723611L20PQFG

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723611L20PQFGI

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

723612L15PFG

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723612L15PFGI

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723612L15PQFG

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723612L15PQFGI

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723612L20PFG

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723612L20PFGI

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723612L20PQFG

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723612L20PQFGI

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

723613L15PFG

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723613L15PFGI

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723613L15PQFG

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723613L15PQFGI

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723613L20PFG

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723613L20PFGI

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723613L20PQFG

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723613L20PQFGI

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

723616L15PFG

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

723616L15PFGI

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

723616L20PFG

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

723616L20PFGI

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

723622L15PFG

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

723622L15PFG8

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

723623L12PFG

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723623L12PFG8

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723623L15PFG

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723623L15PFG8

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723624L15PFG

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

723624L15PFG8

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

723631L15PFG

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

723631L15PFG8

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

723632L15PFG

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

723632L15PFG8

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

723633L12PFG

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723633L12PFG8

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723633L15PFG

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723633L15PFG8

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723634L15PFG

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

723634L15PFG8

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

723641L15PFG

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

723641L15PFG8

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

723642L15PFG

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

723642L15PFG8

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

723643L12PFG

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723643L12PFG8

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723643L15PFG

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723643L15PFG8

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

723644L15PFG

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

7236产品属性

  • 类型

    描述

  • 型号

    7236

  • 制造商

    Integrated Device Technology Inc

  • 功能描述

    FIFO - Bulk

7236供应商更多...

更新时间：2025-11-17 18:21:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
深圳市科恒伟业电子有限公司
723624L20PF
IDT
24+
QFP
8540
只做原装正品现货或订货假一赔十!
询价
深圳市振宏微科技有限公司
723633L15PF
IDT
23+
NA
10726
专做原装正品,假一罚百!
询价
标准国际(香港)有限公司
723651L15PQF
723651L15PQF
25+
45
45
询价
深圳市力拓辉电子有限公司
723-603
WAGO
21+
100
只做原装鄙视假货15118075546
询价
深圳市斌腾达科技有限公司
723616L15PFG8
IDT, Integrated Device Technol
21+
128-LQFP
1000
100%进口原装!长期供应!绝对优势价格(诚信经营)
询价
讯运(深圳/上海)电子有限公司
723623L12PFG
RENESAS(瑞萨)/IDT
2021+
TQFP-128(14x20)
499
询价
深圳市坤融电子科技有限公司
723651L15PF
IDT
2025+
LQFP
5000
原装进口价格优 请找坤融电子!
询价
深圳市一线半导体有限公司
723614L15PF
IDT
24+
QFP-120
38
询价
深圳市向鸿伟业电子有限公司
723642L20PF
IDT
2402+
TQFP100
8324
原装正品!实单价优!
询价
深圳市赛美科科技有限公司
723642L20PF
IDT
TQFP100
68500
一级代理 原装正品假一罚十价格优势长期供货
询价

7236芯片相关品牌

7236规格书下载地址

7236参数引脚图相关

7236数据表相关新闻

  • 7286R50KL.25

    只做原装

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