7236价格

参考价格:¥1.7499

型号:7236 品牌:Weller 备注:这里有7236多少钱,2025年最近7天走势,今日出价,今日竞价,7236批发/采购报价,7236行情走势销售排行榜,7236报价。
型号 功能描述 生产厂家&企业 LOGO 操作
7236

T-1 Subminiature Lamps

T-1 Subminiature Lamps T-1 Subminiature Short Type Lamps

GILWAY

7236

AUDIO Coupling Transformer

文件:146.45 Kbytes Page:1 Pages

FILTRANFiltran LTD

费尔兰特

7236

包装:散装 描述:JACK SCREW HEX 4-40 连接器,互连器件 D-Sub,D 形连接器顶丝

KEYSTONE

Keystone Electronics Corp.

7236

包装:散装 描述:JACK SCREW HEX 4-40 连接器,互连器件 D-Sub,D 形连接器顶丝

KEYSTONE

Keystone Electronics Corp.

7236

3M??Scotch-Weld??7236 B/A

文件:397.03 Kbytes Page:3 Pages

3M

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncFIFOTM

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B • Mailbox bypass register in each direction • Programmable Almost-Full (AF) a

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS SyncBiFIFOTM 64 x 36 x 2

• Free-running CLKA and CLKB can be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs (64 x 36 storage capacity each) buffering data in opposite directions • Mailbox bypass Register for each FIFO • Progra

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS CLOCKED FIFO WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36

• Free-running CLKA and CLKB may be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock edge) • 64 x 36 storage capacity FIFO buffering data from Port A to Port B • Mailbox bypass registers in each direction • Dynamic Port B bus sizing of 36 bits (l

RENESAS

瑞萨

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

CMOS TRIPLE BUS SyncFIFO™ WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2

• Two independent FIFOs (64 X 36 storage capacity each) buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C receives) • Clock frequencies up to 67 MHz (10 ns access time) Free-running clock lines for each port: CLKA, CLKB and CLKC, m

RENESAS

瑞萨

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

CMOS SyncFIFO™512 x 36 1,024 x 36 2,048 x 36

• Storage capacity: IDT723631 - 512 x 36 IDT723641 - 1,024 x 36 IDT723651 - 2,048 x 36 • Supports clock frequencies up to 67 MHz • Fast access times of 11ns • Free-running CLKA and CLKB can be asynchronous or coincident (permits simultaneous reading and writing of data on a single clock ed

RENESAS

瑞萨

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

CMOS SyncBiFIFOTM 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2

• Memory storage capacity: IDT723622 – 256 x 36 x 2 IDT723632 – 512 x 36 x 2 IDT723642 – 1,024 x 36 x 2 • Free-running CLKA and CLKB may be asynchronous or coincident (simultaneous reading and writing of data on a single clock edge is permitted) • Two independent clocked FIFOs buffering dat

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS BUS-MATCHING SyncFIFO TM 256 x 36, 512 x 36, 1,024 x 36

• Memory storage capacity: IDT723623 – 256 x 36 IDT723633 – 512 x 36 IDT723643 – 1,024 x 36 • Clocked FIFO buffering data from Port A to Port B • Clock frequencies up to 83 MHz (8 ns access time) • IDT Standard timing (using EF and FF) or First Word Fall Through Timing (using OR and IR flag

RENESAS

瑞萨

CMOS SyncBiFIFOTM WITH BUS-MATCHING

• Memory storage capacity: IDT723624 – 256 x 36 x 2 IDT723634 – 512 x 36 x 2 IDT723644 – 1,024 x 36 x 2 • Clock frequencies up to 67 MHz (10 ns access time) • Two independent clocked FIFOs buffering data in opposite directions • Select IDT Standard timing (using EFA, EFB, FFA, and FFB flags

RENESAS

瑞萨

7236产品属性

  • 类型

    描述

  • 型号

    7236

  • 功能描述

    螺丝和紧固件 JACK SCREW KIT 4-40

  • RoHS

  • 制造商

    Unspecified

  • 类型

    Washer

  • 材料

    Steel

  • 电镀

    Nickel

更新时间:2025-8-17 16:30:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
IDT
24+
QFP-120
38
723651L15PQF
45
45
IDT
2402+
TQFP100
8324
原装正品!实单价优!
IDT
2023+
标准封装
8700
原装现货
RENESAS(瑞萨电子)
22+
NA
500000
万三科技,秉承原装,购芯无忧
RENESAS(瑞萨)/IDT
2447
TQFP-120(14x14)
315000
45个/管一级代理专营品牌!原装正品,优势现货,长期
IDT
23+
PLCC
9526
IDT
99/00+
TQFP/100
119
原装现货海量库存欢迎咨询
WAGO
24+
con
10000
查现货到京北通宇商城
TX
2020+
SOT89
20000
百分百原装正品 真实公司现货库存 本公司只做原装 可

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    2022-8-12
  • 7283-6437-90新到货全新原装,假一罚十!

    1375819-1 174967-2 1670146-1 62181-1 7157-6407-70 7283-9076-30 927835-1 7283-5691-10 7116-4660-02 7122-4129-90 7282-7029-40 964280-2 1743656-1 1241414-1 2-100103-6 165565-1 104257-3 776001-1 827040-1 925714-1 7158-3032-60 1-480700-0 1241410-1 1-160301-6 9

    2022-8-11
  • 7-215/R6C-AQ1R2B/3T原装现货

    定位: Top View If - 順向電流: 20 mA 封裝: Reel 品牌: Everlight 安裝風格: SMD/SMT 濕度敏感: Yes 產品類型: LED - Standard 原廠包裝數量: 3000 子類別: LEDs

    2019-11-4