• Memory storage capacity:

IDT723622 – 256 x 36 x 2

IDT723632 – 512 x 36 x 2

IDT723642 – 1,024 x 36 x 2

• Free-running CLKA and CLKB may be asynchronous or

coincident (simultaneous reading and writing of data on a single

clock edge is permitted)

• Two independent clocked FIFOs buffering data in opposite directions

• Mailbox bypass register for each FIFO

• Programmable Almost-Full and Almost-Empty flags

• Microprocessor Interface Control Logic

• IRA, ORA, AEA, and AFA flags synchronized by CLKA

• IRB, ORB, AEB, and AFB flags synchronized by CLKB

• Supports clock frequencies up to 66.7MHz