16K x 9 SuperSync FIFO, 5.0V

The 72261 is a 16K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. The period required by the retransmit operation Pin-compatible with the 722x1 SuperSync FIFOs\n10ns read/write cycle time (8ns access time)\nFixed, low first word data latency time\nAuto power down minimizes standby power consumption\nRetransmit operation with fixed, low first word data latency time\nEmpty, Full and Half-Full flags signal FIFO st;

包装：散装 描述：HEX CONTRACTOR POWER BIT 7/32\ 工具 螺丝和螺母起子 - 刀头、刀片和手柄

封装/外壳：64-LQFP 功能：同步 包装：托盘 描述：IC FIFO 8192X18 LP 10NS 64QFP 集成电路（IC） FIFO 存储器

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages

CMOS SUPERSYNC FIFOO 16,384 x 9, 32,768 x 9

DESCRIPTION: The IDT72261/72271 are monolithic, CMOS, high capacity, high speed, low power first-in, first-out (FIFO) memories with clocked read and write controls. These FIFOs are applicable for a wide variety of data buffering needs, such as optical disk controllers, local area networks (LANs),

CMOS SuperSync FIFO

DESCRIPTION: The IDT72261LA/72271LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

CMOS SuperSync FIFO™ 16,384 x 9 32,768 x 9

FEATURES: • Choose among the following memory organizations: IDT72261LA 16,384 x 9 IDT72271LA 32,768 x 9 • Pin-compatible with the IDT72281/72291 SuperSync FIFOs • 10ns read/write cycle time (8ns access time) • Fixed, low first word data latency time • Auto power down minimizes standby powe

CMOS SuperSync FIFO

文件：446.12 Kbytes Page：27 Pages