位置：首页 > IC中文资料第6793页 > 54LS114
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
54LS114 | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSC 国半 |   | |
54LS114 | Dual Negative Edge-Triggered Flip-Flop with Common Clocks and Clears | TI 德州仪器 | | |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSC 国半 | | ||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSC 国半 | | ||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSC 国半 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the | MOTOROLA 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the | MOTOROLA 摩托罗拉 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | |
54LS114产品属性
- 类型
描述
- 型号
54LS114
- 制造商
NSC
- 制造商全称
National Semiconductor
- 功能描述
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
54LS114规格书下载地址
54LS114参数引脚图相关
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54LS114数据表相关新闻
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DdatasheetPDF页码索引
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