| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
SN54LS114 | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 |   | |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the | Motorola 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the | Motorola 摩托罗拉 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK 文件：240.11 Kbytes Page：8 Pages | TI 德州仪器 | | ||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | | ||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | | ||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | | ||
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears 文件：118.08 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | |
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
三年内 |
1983 |
只做原装正品 |
||||
TI/德州仪器 |
24+ |
CDIP |
1500 |
只供应原装正品 欢迎询价 |
|||
TI |
21+ |
CDIP |
1568 |
10年芯程,只做原装正品现货,欢迎加微信垂询! |
|||
TI |
1725+ |
CDIP14 |
6528 |
只做原装正品现货!或订货假一赔十! |
|||
TI |
2018+ |
26976 |
代理原装现货/特价热卖! |
||||
TI |
422 |
53 |
全新进口原装现货-军工器件供应商 |
||||
TI/德州仪器 |
23+ |
CDIP14 |
30000 |
原装现货,假一赔十. |
|||
TI/德州仪器 |
23+ |
DIP |
11200 |
原厂授权一级代理、全球订货优势渠道、可提供一站式BO |
|||
最新 |
2000 |
原装正品现货 |
|||||
TI/TEXAS |
23+ |
DIP陶瓷 |
8931 |
SN54LS114规格书下载地址
SN54LS114参数引脚图相关
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