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型号 功能描述 生产厂家 企业 LOGO 操作
SN54LS114A

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the

MOTOROLA

摩托罗拉

SN54LS114A

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when the

MOTOROLA

摩托罗拉

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK

文件:240.11 Kbytes Page:8 Pages

TI

德州仪器

更新时间:2026-8-2 23:01:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
25+
48-VQFN(7x7)
18798
正规渠道,免费送样。支持账期,BOM一站式配齐
TI
25+
48-VQFN(7x7)
18746
样件支持,可原厂排单订货!
SI-EN
2016+
SMD
3000
只做原装,假一罚十,公司可开17%增值税发票!
24+
3000
自己现货
TI
23+
BGA
5000
原装正品,假一罚十
TexasInstruments
18+
ICDGTLPWRCTRLR48VQFN
6800
公司原装现货/欢迎来电咨询!
TI
23+
48VQFN
3200
公司只做原装,可来电咨询
TI
三年内
1983
只做原装正品
SI-EN
22+
SMD
20000
公司只有原装 品质保障
SI-EN
20+
SMD
32970
原装优势主营型号-可开原型号增税票

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